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| author | Peter Maydell <peter.maydell@linaro.org> | 2017-10-31 14:28:25 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-10-31 14:28:25 +0000 |
| commit | 7fa00e204902cee0b33a0c60de87e87319d1809f (patch) | |
| tree | 7c8c89f0d14e2c1f676a1bfcd1265fefdcc3b5d2 /hw/pci-host/gpex.c | |
| parent | 92c7ec5cd4d15c76218703f7bd3ca75bd46353b7 (diff) | |
| parent | 168df2dea701bbf3118bdfea7794369dfa694d3d (diff) | |
| download | focaccia-qemu-7fa00e204902cee0b33a0c60de87e87319d1809f.tar.gz focaccia-qemu-7fa00e204902cee0b33a0c60de87e87319d1809f.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20171031' into staging
target-arm queue: * fix instruction-length bit in syndrome for WFI/WFE traps * xlnx-zcu102: Specify the max number of CPUs * msf2: Remove dead code reported by Coverity * msf2: Wire up SYSRESETREQ in SoC for system reset * hw/pci-host/gpex: Improve INTX to gsi routing error checking # gpg: Signature made Tue 31 Oct 2017 13:10:02 GMT # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20171031: hw/pci-host/gpex: Improve INTX to gsi routing error checking msf2: Wire up SYSRESETREQ in SoC for system reset msf2: Remove dead code reported by Coverity xlnx-zcu102: Specify the max number of CPUs fix WFI/WFE length in syndrome register Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/pci-host/gpex.c')
| -rw-r--r-- | hw/pci-host/gpex.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c index 4090793cf0..edf305b1fd 100644 --- a/hw/pci-host/gpex.c +++ b/hw/pci-host/gpex.c @@ -57,9 +57,14 @@ static PCIINTxRoute gpex_route_intx_pin_to_irq(void *opaque, int pin) { PCIINTxRoute route; GPEXHost *s = opaque; + int gsi = s->irq_num[pin]; - route.mode = PCI_INTX_ENABLED; - route.irq = s->irq_num[pin]; + route.irq = gsi; + if (gsi < 0) { + route.mode = PCI_INTX_DISABLED; + } else { + route.mode = PCI_INTX_ENABLED; + } return route; } @@ -81,6 +86,7 @@ static void gpex_host_realize(DeviceState *dev, Error **errp) sysbus_init_mmio(sbd, &s->io_ioport); for (i = 0; i < GPEX_NUM_IRQS; i++) { sysbus_init_irq(sbd, &s->irq[i]); + s->irq_num[i] = -1; } pci->bus = pci_register_bus(dev, "pcie.0", gpex_set_irq, |