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authorPeter Maydell <peter.maydell@linaro.org>2017-09-14 18:54:09 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-09-14 18:54:09 +0100
commitd28e29a92585e94264628b1b27262fe2d7573f51 (patch)
treee956f9c4bd71330f186a36847460999882a6c651 /hw/pci-host/gpex.c
parent3dabde1128b671f36ac6cb36b97b273139964420 (diff)
parentce3bc112cdb1d462e2d52eaa17a7314e7f3af504 (diff)
downloadfocaccia-qemu-d28e29a92585e94264628b1b27262fe2d7573f51.tar.gz
focaccia-qemu-d28e29a92585e94264628b1b27262fe2d7573f51.zip
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20170914' into staging
target-arm queue:
 * v7M: various code cleanups
 * v7M: set correct BFSR bits on bus fault
 * v7M: clear exclusive monitor on reset and exception entry/exit
 * v7M: don't apply priority mask to negative priorities
 * zcu102: support 'secure' and 'virtualization' machine properties
 * aarch64: fix ERET single stepping
 * gpex: implement PCI INTx routing
 * mps2-an511: fix UART overflow interrupt line wiring

# gpg: Signature made Thu 14 Sep 2017 18:50:48 BST
# gpg:                using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20170914:
  mps2-an511: Fix wiring of UART overflow interrupt lines
  hw/pci-host/gpex: Implement PCI INTx routing
  hw/arm/virt: Set INTx/gsi mapping
  hw/pci-host/gpex: Set INTx index/gsi mapping
  target/arm: Avoid an extra temporary for store_exclusive
  AArch64: Fix single stepping of ERET instruction
  xlnx-zcu102: Mark the EP108 machine as deprecated
  xlnx-zcu102: Add a machine level virtualization property
  xlnx-zcu102: Add a machine level secure property
  xlnx-zcu102: Manually create the machines
  xlnx-ep108: Rename to ZCU102
  target/arm: Rename 'type' to 'excret' in do_v7m_exception_exit()
  target/arm: Add and use defines for EXCRET constants
  target/arm: Remove unnecessary '| 0xf0000000' from do_v7m_exception_exit()
  nvic: Don't apply group priority mask to negative priorities
  target/arm: Get PRECISERR and IBUSERR the right way round
  target/arm: Clear exclusive monitor on v7M reset, exception entry/exit
  target/arm: Use M_REG_NUM_BANKS rather than hardcoding 2

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/pci-host/gpex.c')
-rw-r--r--hw/pci-host/gpex.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c
index 83084b9aab..be25245219 100644
--- a/hw/pci-host/gpex.c
+++ b/hw/pci-host/gpex.c
@@ -43,6 +43,27 @@ static void gpex_set_irq(void *opaque, int irq_num, int level)
     qemu_set_irq(s->irq[irq_num], level);
 }
 
+int gpex_set_irq_num(GPEXHost *s, int index, int gsi)
+{
+    if (index >= GPEX_NUM_IRQS) {
+        return -EINVAL;
+    }
+
+    s->irq_num[index] = gsi;
+    return 0;
+}
+
+static PCIINTxRoute gpex_route_intx_pin_to_irq(void *opaque, int pin)
+{
+    PCIINTxRoute route;
+    GPEXHost *s = opaque;
+
+    route.mode = PCI_INTX_ENABLED;
+    route.irq = s->irq_num[pin];
+
+    return route;
+}
+
 static void gpex_host_realize(DeviceState *dev, Error **errp)
 {
     PCIHostState *pci = PCI_HOST_BRIDGE(dev);
@@ -67,6 +88,7 @@ static void gpex_host_realize(DeviceState *dev, Error **errp)
                                 &s->io_ioport, 0, 4, TYPE_PCIE_BUS);
 
     qdev_set_parent_bus(DEVICE(&s->gpex_root), BUS(pci->bus));
+    pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq);
     qdev_init_nofail(DEVICE(&s->gpex_root));
 }