Merge tag 'pull-ppc-20230626' of https://github.com/legoater/qemu into staging

ppc queue:

* New maintainers
* Nested implementation cleanups
* Various cleanups of the CPU implementation
* SMT support for pseries
* Improvements of the XIVE2 TIMA modeling
* Extra avocado tests for pseries

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* tag 'pull-ppc-20230626' of https://github.com/legoater/qemu: (30 commits)
  tests/avocado: ppc test VOF bios Linux boot
  pnv/xive2: Check TIMA special ops against a dedicated array for P10
  pnv/xive2: Add a get_config() method on the presenter class
  tests/avocado: Add ppc64 pseries multiprocessor boot tests
  tests/avocado: boot ppc64 pseries to Linux VFS mount
  spapr: TCG allow up to 8-thread SMT on POWER8 and newer CPUs
  hw/ppc/spapr: Test whether TCG is enabled with tcg_enabled()
  target/ppc: Add msgsnd/p and DPDES SMT support
  target/ppc: Add support for SMT CTRL register
  target/ppc: Add initial flags and helpers for SMT support
  target/ppc: Fix sc instruction handling of LEV field
  target/ppc: Better CTRL SPR implementation
  target/ppc: Add ISA v3.1 LEV indication in SRR1 for system call interrupts
  target/ppc: Implement HEIR SPR
  target/ppc: Add SRR1 prefix indication to interrupt handlers
  target/ppc: Change partition-scope translate interface
  target/ppc: Fix instruction loading endianness in alignment interrupt
  ppc/spapr: Move spapr nested HV to a new file
  ppc/spapr: load and store l2 state with helper functions
  ppc/spapr: Add a nested state struct
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

1 files changed, 7 insertions, 7 deletions

diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index 542f9e2932..6232cbeee1 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -133,13 +133,13 @@ static void pnv_phb4_rc_config_write(PnvPHB4 *phb, unsigned off,
     PCIDevice *pdev;
 
     if (size != 4) {
-        phb_error(phb, "rc_config_write invalid size %d\n", size);
+        phb_error(phb, "rc_config_write invalid size %d", size);
         return;
     }
 
     pdev = pci_find_device(pci->bus, 0, 0);
     if (!pdev) {
-        phb_error(phb, "rc_config_write device not found\n");
+        phb_error(phb, "rc_config_write device not found");
         return;
     }
 
@@ -155,13 +155,13 @@ static uint64_t pnv_phb4_rc_config_read(PnvPHB4 *phb, unsigned off,
     uint64_t val;
 
     if (size != 4) {
-        phb_error(phb, "rc_config_read invalid size %d\n", size);
+        phb_error(phb, "rc_config_read invalid size %d", size);
         return ~0ull;
     }
 
     pdev = pci_find_device(pci->bus, 0, 0);
     if (!pdev) {
-        phb_error(phb, "rc_config_read device not found\n");
+        phb_error(phb, "rc_config_read device not found");
         return ~0ull;
     }
 
@@ -1039,19 +1039,19 @@ static void pnv_pec_stk_nest_xscom_write(void *opaque, hwaddr addr,
         if (phb->nest_regs[PEC_NEST_STK_BAR_EN] &
             (PEC_NEST_STK_BAR_EN_MMIO0 |
              PEC_NEST_STK_BAR_EN_MMIO1)) {
-            phb_pec_error(pec, "Changing enabled BAR unsupported\n");
+            phb_pec_error(pec, "Changing enabled BAR unsupported");
         }
         phb->nest_regs[reg] = val & 0xffffffffff000000ull;
         break;
     case PEC_NEST_STK_PHB_REGS_BAR:
         if (phb->nest_regs[PEC_NEST_STK_BAR_EN] & PEC_NEST_STK_BAR_EN_PHB) {
-            phb_pec_error(pec, "Changing enabled BAR unsupported\n");
+            phb_pec_error(pec, "Changing enabled BAR unsupported");
         }
         phb->nest_regs[reg] = val & 0xffffffffffc00000ull;
         break;
     case PEC_NEST_STK_INT_BAR:
         if (phb->nest_regs[PEC_NEST_STK_BAR_EN] & PEC_NEST_STK_BAR_EN_INT) {
-            phb_pec_error(pec, "Changing enabled BAR unsupported\n");
+            phb_pec_error(pec, "Changing enabled BAR unsupported");
         }
         phb->nest_regs[reg] = val & 0xfffffff000000000ull;
         break;