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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-03-19 13:00:41 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-03-19 13:00:41 +0000 |
| commit | 319c66d5abfb30553895589d24b70043639ad06d (patch) | |
| tree | f309487ca630fb850083a15d58cea59ca0d9b9d9 /hw/pci-host/prep.c | |
| parent | 059b3527f0229f4d60fd77a317503d42abd5e50f (diff) | |
| parent | 09e037354b6f940c18f417f23355cffd23f4fde5 (diff) | |
| download | focaccia-qemu-319c66d5abfb30553895589d24b70043639ad06d.tar.gz focaccia-qemu-319c66d5abfb30553895589d24b70043639ad06d.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140319' into staging
target-arm queue: * last few A64 Neon instructions * fix some PL011 UART bugs causing occasional serial lockups * fix the non-PCI AHCI device # gpg: Signature made Wed 19 Mar 2014 12:00:59 GMT using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * remotes/pmaydell/tags/pull-target-arm-20140319: target-arm: A64: Add saturating accumulate ops (USQADD/SUQADD) target-arm: A64: Add saturating int ops (SQNEG/SQABS) pl011: fix incorrect logic to set the RXFF flag pl011: fix UARTRSR accesses corrupting the UARTCR value pl011: reset the fifo when enabled or disabled ahci: fix sysbus support Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/pci-host/prep.c')
0 files changed, 0 insertions, 0 deletions