diff options
| author | BALATON Zoltan <balaton@eik.bme.hu> | 2014-02-28 11:28:03 +0100 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2014-03-11 13:27:27 +0200 |
| commit | 263cf4367fd86dc0e15beebe65919cd50501844d (patch) | |
| tree | c1ffc58632798e10722d7e9a0301989089e0b17c /hw/pci-host/q35.c | |
| parent | dc655404659def26fbcd66583ca61575af9da8b9 (diff) | |
| download | focaccia-qemu-263cf4367fd86dc0e15beebe65919cd50501844d.tar.gz focaccia-qemu-263cf4367fd86dc0e15beebe65919cd50501844d.zip | |
q35: Correct typo BRDIGE -> BRIDGE
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/pci-host/q35.c')
| -rw-r--r-- | hw/pci-host/q35.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 4bc2e0118e..8b8cc4e294 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -272,7 +272,7 @@ static void mch_update_smram(MCHPCIState *mch) PCIDevice *pd = PCI_DEVICE(mch); memory_region_transaction_begin(); - smram_update(&mch->smram_region, pd->config[MCH_HOST_BRDIGE_SMRAM], + smram_update(&mch->smram_region, pd->config[MCH_HOST_BRIDGE_SMRAM], mch->smm_enabled); memory_region_transaction_commit(); } @@ -283,7 +283,7 @@ static void mch_set_smm(int smm, void *arg) PCIDevice *pd = PCI_DEVICE(mch); memory_region_transaction_begin(); - smram_set_smm(&mch->smm_enabled, smm, pd->config[MCH_HOST_BRDIGE_SMRAM], + smram_set_smm(&mch->smm_enabled, smm, pd->config[MCH_HOST_BRIDGE_SMRAM], &mch->smram_region); memory_region_transaction_commit(); } @@ -306,8 +306,8 @@ static void mch_write_config(PCIDevice *d, mch_update_pciexbar(mch); } - if (ranges_overlap(address, len, MCH_HOST_BRDIGE_SMRAM, - MCH_HOST_BRDIGE_SMRAM_SIZE)) { + if (ranges_overlap(address, len, MCH_HOST_BRIDGE_SMRAM, + MCH_HOST_BRIDGE_SMRAM_SIZE)) { mch_update_smram(mch); } } @@ -347,7 +347,7 @@ static void mch_reset(DeviceState *qdev) pci_set_quad(d->config + MCH_HOST_BRIDGE_PCIEXBAR, MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT); - d->config[MCH_HOST_BRDIGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_DEFAULT; + d->config[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_DEFAULT; mch_update(mch); } |