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| author | Gerd Hoffmann <kraxel@redhat.com> | 2015-04-15 16:43:24 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2015-06-05 17:36:39 +0200 |
| commit | 7744752402d11cebe4c1d4079dcd40d3145eb37b (patch) | |
| tree | 0b46eb6d448b807bdce1a44028377f220403cc20 /hw/pci-host/q35.c | |
| parent | 64130fa4a1514ae7a580b8d46290a11784770600 (diff) | |
| download | focaccia-qemu-7744752402d11cebe4c1d4079dcd40d3145eb37b.tar.gz focaccia-qemu-7744752402d11cebe4c1d4079dcd40d3145eb37b.zip | |
q35: fix ESMRAMC default
The cache bits in ESMRAMC are hardcoded to 1 (=disabled) according to the q35 mch specs. Add and use a define with this default. While being at it also update the SMRAM default to use the name (no code change, just makes things a bit more readable). Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/pci-host/q35.c')
| -rw-r--r-- | hw/pci-host/q35.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 8f8d9e86e1..4e65bdc559 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -354,6 +354,7 @@ static void mch_reset(DeviceState *qdev) MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT); d->config[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_DEFAULT; + d->config[MCH_HOST_BRIDGE_ESMRAMC] = MCH_HOST_BRIDGE_ESMRAMC_DEFAULT; mch_update(mch); } |