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authorPeter Maydell <peter.maydell@linaro.org>2018-06-19 13:07:30 +0100
committerAleksandar Markovic <amarkovic@wavecomp.com>2018-06-27 20:12:34 +0200
commit4f91740698ced512fdad8540eb0bd232fc70aadd (patch)
tree9cf86f19f4f4bbcd7650f4a9672f71c727c597f4 /hw/pci-host/xilinx-pcie.c
parent917b77f5e5a713c217ecc962fd8c491aa9b586aa (diff)
downloadfocaccia-qemu-4f91740698ced512fdad8540eb0bd232fc70aadd.tar.gz
focaccia-qemu-4f91740698ced512fdad8540eb0bd232fc70aadd.zip
hw/pci-host/xilinx-pcie: don't make "io" region be RAM
Currently we use memory_region_init_rom_nomigrate() to create
the "io" memory region to pass to pci_register_root_bus().
This is a dummy region, because this PCI controller doesn't
support accesses to PCI IO space.

There is no reason for the dummy region to be a RAM region;
it is only used as a place where PCI BARs can be mapped,
and if you could get a PCI card to do a bus master access
to the IO space it should not get acts-like-RAM behaviour.
Use a simple container memory region instead. (We do have
one PCI card model which can do bus master accesses to IO
space -- the LSI53C895A SCSI adaptor.)

This avoids the oddity of having a memory region which is
RAM but where the RAM is not migrated.

Note that the size of the region we use here has no
effect on behaviour.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
Diffstat (limited to 'hw/pci-host/xilinx-pcie.c')
-rw-r--r--hw/pci-host/xilinx-pcie.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c
index 044e312dc1..b0a31b917d 100644
--- a/hw/pci-host/xilinx-pcie.c
+++ b/hw/pci-host/xilinx-pcie.c
@@ -120,9 +120,8 @@ static void xilinx_pcie_host_realize(DeviceState *dev, Error **errp)
     memory_region_init(&s->mmio, OBJECT(s), "mmio", UINT64_MAX);
     memory_region_set_enabled(&s->mmio, false);
 
-    /* dummy I/O region */
-    memory_region_init_ram_nomigrate(&s->io, OBJECT(s), "io", 16, NULL);
-    memory_region_set_enabled(&s->io, false);
+    /* dummy PCI I/O region (not visible to the CPU) */
+    memory_region_init(&s->io, OBJECT(s), "io", 16);
 
     /* interrupt out */
     qdev_init_gpio_out_named(dev, &s->irq, "interrupt_out", 1);