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authorAurelien Jarno <aurelien@aurel32.net>2010-04-09 20:52:48 +0200
committerAurelien Jarno <aurelien@aurel32.net>2010-04-19 07:03:06 +0200
commit914ccf51b07af860021863e0f8e46eac9ffbcb68 (patch)
treea879811d8bc42a82063741d8c1817347bd6d559a /hw/pci.c
parentbf5675efe33888fe058210be98259a34faf4d4e5 (diff)
downloadfocaccia-qemu-914ccf51b07af860021863e0f8e46eac9ffbcb68.tar.gz
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tcg/arm: optimize register allocation order
The beginning of the register allocation order list on the TCG arm
target matches the list of clobbered registers. This means that when an
helper is called, there is almost always clobbered registers that have
to be spilled.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'hw/pci.c')
0 files changed, 0 insertions, 0 deletions