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| author | Isaku Yamahata <yamahata@valinux.co.jp> | 2010-11-26 21:01:41 +0900 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2010-12-09 12:47:48 +0200 |
| commit | b1aeb92666d2fde413c34578b3b42bbfe5f2a506 (patch) | |
| tree | f29a9326008c68ca7c1a762f7f3f6e97832bef7e /hw/pci.h | |
| parent | 783e7706937fe15523b609b545587a028a2bdd03 (diff) | |
| download | focaccia-qemu-b1aeb92666d2fde413c34578b3b42bbfe5f2a506.tar.gz focaccia-qemu-b1aeb92666d2fde413c34578b3b42bbfe5f2a506.zip | |
pci: make command SERR bit writable
pcie aer needs SERR bit to be writable, and the PCI spec requires this as well. For compatibility, introduce compat global property command_serr_enable and make this bit readonly for a pre 0.14 pc machine. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/pci.h')
| -rw-r--r-- | hw/pci.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/hw/pci.h b/hw/pci.h index 89f7b761e7..099c2517ae 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -118,6 +118,10 @@ enum { /* multifunction capable device */ #define QEMU_PCI_CAP_MULTIFUNCTION_BITNR 3 QEMU_PCI_CAP_MULTIFUNCTION = (1 << QEMU_PCI_CAP_MULTIFUNCTION_BITNR), + + /* command register SERR bit enabled */ +#define QEMU_PCI_CAP_SERR_BITNR 4 + QEMU_PCI_CAP_SERR = (1 << QEMU_PCI_CAP_SERR_BITNR), }; struct PCIDevice { |