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authorIsaku Yamahata <yamahata@valinux.co.jp>2009-10-30 21:20:56 +0900
committerAnthony Liguori <aliguori@us.ibm.com>2009-11-09 08:43:04 -0600
commite369cad7cd574d6d7e680ccd4d3227de7d1a0135 (patch)
tree45f78e036fa819ceed08554dc66b1238a985b564 /hw/pci.h
parent2e49d64ac7578b707f1dffb825cf355b29514fd9 (diff)
downloadfocaccia-qemu-e369cad7cd574d6d7e680ccd4d3227de7d1a0135.tar.gz
focaccia-qemu-e369cad7cd574d6d7e680ccd4d3227de7d1a0135.zip
pci: introduce constant PCI_NUM_PINS for the number of interrupt pins, 4.
introduce constant PCI_NUM_PINS for the number of interrupt pins, 4.
and use it.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/pci.h')
-rw-r--r--hw/pci.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/hw/pci.h b/hw/pci.h
index 93f93fb875..476ff594da 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -158,6 +158,8 @@ typedef struct PCIIORegion {
 /* Size of the standard PCI config space */
 #define PCI_CONFIG_SPACE_SIZE 0x100
 
+#define PCI_NUM_PINS 4 /* A-D */
+
 /* Bits in cap_present field. */
 enum {
     QEMU_PCI_CAP_MSIX = 0x1,
@@ -192,7 +194,7 @@ struct PCIDevice {
     qemu_irq *irq;
 
     /* Current IRQ levels.  Used internally by the generic PCI code.  */
-    int irq_state[4];
+    int irq_state[PCI_NUM_PINS];
 
     /* Capability bits */
     uint32_t cap_present;