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| author | Michael S. Tsirkin <mst@redhat.com> | 2009-11-25 15:44:40 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2009-12-07 21:50:53 +0200 |
| commit | f9bf77dd1f838b0061172fe41709b221956da2f5 (patch) | |
| tree | cd8a308b9b646770a1f29dc28456a6558b8ba519 /hw/pci.h | |
| parent | d036bb215e0ac1d1fd467239f1d3b7d904cac90a (diff) | |
| download | focaccia-qemu-f9bf77dd1f838b0061172fe41709b221956da2f5.tar.gz focaccia-qemu-f9bf77dd1f838b0061172fe41709b221956da2f5.zip | |
pci: interrupt status bit implementation
interrupt status is a mandatory feature in PCI spec, so devices must implement it to be spec compliant. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Isaku Yamahata <yamahata@valinux.co.jp>
Diffstat (limited to 'hw/pci.h')
| -rw-r--r-- | hw/pci.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/pci.h b/hw/pci.h index ebf6c39d52..dc9b8604fe 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -102,6 +102,7 @@ typedef struct PCIIORegion { #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ #define PCI_COMMAND_MASTER 0x4 /* Enable bus master */ #define PCI_STATUS 0x06 /* 16 bits */ +#define PCI_STATUS_INTERRUPT 0x08 #define PCI_REVISION_ID 0x08 /* 8 bits */ #define PCI_CLASS_PROG 0x09 /* Reg. Level Programming Interface */ #define PCI_CLASS_DEVICE 0x0a /* Device class */ |