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| author | Jan Kiszka <jan.kiszka@siemens.com> | 2014-07-27 09:08:29 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2014-08-14 13:20:33 +0200 |
| commit | cc943c36faa192cd4b32af8fe5edb31894017d35 (patch) | |
| tree | 71ceb2e99d9b8ab7b671fdedc36f0c36b15e3638 /hw/pci/msi.c | |
| parent | 2d591ce2aeebf9620ff527c7946844a3122afeec (diff) | |
| download | focaccia-qemu-cc943c36faa192cd4b32af8fe5edb31894017d35.tar.gz focaccia-qemu-cc943c36faa192cd4b32af8fe5edb31894017d35.zip | |
pci: Use bus master address space for delivering MSI/MSI-X messages
The spec says (and real HW confirms this) that, if the bus master bit is 0, the device will not generate any PCI accesses. MSI and MSI-X messages fall among these, so we should use the corresponding address space to deliver them. This will prevent delivery if bus master support is disabled. Cc: qemu-stable@nongnu.org Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/pci/msi.c')
| -rw-r--r-- | hw/pci/msi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/pci/msi.c b/hw/pci/msi.c index a4a3040d4d..52d23130d9 100644 --- a/hw/pci/msi.c +++ b/hw/pci/msi.c @@ -291,7 +291,7 @@ void msi_notify(PCIDevice *dev, unsigned int vector) "notify vector 0x%x" " address: 0x%"PRIx64" data: 0x%"PRIx32"\n", vector, msg.address, msg.data); - stl_le_phys(&address_space_memory, msg.address, msg.data); + stl_le_phys(&dev->bus_master_as, msg.address, msg.data); } /* Normally called by pci_default_write_config(). */ |