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| author | Michael S. Tsirkin <mst@redhat.com> | 2020-05-14 11:14:39 -0400 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2020-06-09 09:31:34 -0400 |
| commit | 191f90cbea08122b48107f1f9116106fbf3bdfac (patch) | |
| tree | 685a202e5a0e5bd477d0c4ad4dc9db9db9c8a205 /hw/pci/msix.c | |
| parent | 49ee11555262a256afec592dfed7c5902d5eefd2 (diff) | |
| download | focaccia-qemu-191f90cbea08122b48107f1f9116106fbf3bdfac.tar.gz focaccia-qemu-191f90cbea08122b48107f1f9116106fbf3bdfac.zip | |
msix: allow qword MSI-X table accesses
PCI spec says:
For all accesses to MSI-X Table and MSI-X PBA fields, software must use
aligned full DWORD or aligned full QWORD transactions; otherwise, the
result is undefined.
However, since MSI-X was converted to use memory API, QEMU
started blocking qword transactions, only allowing DWORD
ones. Guests do not seem to use QWORD accesses, but let's
be spec compliant.
Fixes: 95524ae8dc8f ("msix: convert to memory API")
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Diffstat (limited to 'hw/pci/msix.c')
| -rw-r--r-- | hw/pci/msix.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/hw/pci/msix.c b/hw/pci/msix.c index 29187898f2..e6a5559038 100644 --- a/hw/pci/msix.c +++ b/hw/pci/msix.c @@ -199,6 +199,9 @@ static const MemoryRegionOps msix_table_mmio_ops = { .endianness = DEVICE_LITTLE_ENDIAN, .valid = { .min_access_size = 4, + .max_access_size = 8, + }, + .impl = { .max_access_size = 4, }, }; @@ -227,6 +230,9 @@ static const MemoryRegionOps msix_pba_mmio_ops = { .endianness = DEVICE_LITTLE_ENDIAN, .valid = { .min_access_size = 4, + .max_access_size = 8, + }, + .impl = { .max_access_size = 4, }, }; |