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| author | Sairaj Kodilkar <sarunkod@amd.com> | 2025-05-16 15:35:34 +0530 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2025-06-01 06:38:53 -0400 |
| commit | 31753d5a336fbb4e9246397f4b90b6f611f27f22 (patch) | |
| tree | 60716674b6aaf7b6e85302ace5ef7d69c982b9a8 /hw/pci/pci.c | |
| parent | ac8fc4ccacd8a77d8d56dc3990bfb221c1f48fcd (diff) | |
| download | focaccia-qemu-31753d5a336fbb4e9246397f4b90b6f611f27f22.tar.gz focaccia-qemu-31753d5a336fbb4e9246397f4b90b6f611f27f22.zip | |
hw/i386/amd_iommu: Fix device setup failure when PT is on.
Commit c1f46999ef506 ("amd_iommu: Add support for pass though mode")
introduces the support for "pt" flag by enabling nodma memory when
"pt=off". This allowed VFIO devices to successfully register notifiers
by using nodma region.
But, This also broke things when guest is booted with the iommu=nopt
because, devices bypass the IOMMU and use untranslated addresses (IOVA) to
perform DMA reads/writes to the nodma memory region, ultimately resulting in
a failure to setup the devices in the guest.
Fix the above issue by always enabling the amdvi_dev_as->iommu memory region.
But this will once again cause VFIO devices to fail while registering the
notifiers with AMD IOMMU memory region.
Fixes: c1f46999ef506 ("amd_iommu: Add support for pass though mode")
Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com>
Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
Message-Id: <20250516100535.4980-2-sarunkod@amd.com>
Fixes: c1f46999ef506 ("amd_iommu: Add support for pass though mode")
Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com>
Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
Diffstat (limited to 'hw/pci/pci.c')
0 files changed, 0 insertions, 0 deletions