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| author | Peter Maydell <peter.maydell@linaro.org> | 2017-07-04 11:17:02 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-07-04 11:17:02 +0100 |
| commit | 0c7a8b9baa744ae4323bb46cb4fe942355beaa85 (patch) | |
| tree | e28faa62f48d74006d5b1c871ef13a23f4f9bb64 /hw/pci/pci_bridge.c | |
| parent | fd479c60f5766f7fb247ad146b9e3c33d03d2055 (diff) | |
| parent | d2f9ca94165b10c51d6d6cae5fe1cadf1ca42076 (diff) | |
| download | focaccia-qemu-0c7a8b9baa744ae4323bb46cb4fe942355beaa85.tar.gz focaccia-qemu-0c7a8b9baa744ae4323bb46cb4fe942355beaa85.zip | |
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
pc, acpi, pci, virtio: fixes, cleanups, features, tests Some fixes and cleanups. New tests. Configurable tx queue size for virtio-net. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Mon 03 Jul 2017 20:43:17 BST # gpg: using RSA key 0x281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: (21 commits) i386/acpi: update expected acpi files virtio-net: fix tx queue size for !vhost-user tests: Add unit tests for the VM Generation ID feature vhost-user: unregister slave req handler at cleanup time vhost: ensure vhost_ops are set before calling iotlb callback intel_iommu: fix migration breakage on mr switch hw/acpi: remove dead acpi code fw_cfg: move setting of FW_CFG_VERSION_DMA bit to fw_cfg_init1() fw_cfg: don't map the fw_cfg IO ports in fw_cfg_io_realize() i386/kvm/pci-assign: Use errp directly rather than local_err i386/kvm/pci-assign: Fix return type of verify_irqchip_kernel() pci: Convert shpc_init() to Error pci: Convert to realize pci: Replace pci_add_capability2() with pci_add_capability() pci: Make errp the last parameter of pci_add_capability() pci: Fix the wrong assertion. pci: Add comment for pci_add_capability2() pci: Clean up error checking in pci_add_capability() intel_iommu: relax iq tail check on VTD_GCMD_QIE enable hw/pci-bridge/dec: Classify the DEC PCI bridge as bridge device ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/pci/pci_bridge.c')
| -rw-r--r-- | hw/pci/pci_bridge.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index 5118ef404f..720119b21a 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -33,6 +33,7 @@ #include "hw/pci/pci_bridge.h" #include "hw/pci/pci_bus.h" #include "qemu/range.h" +#include "qapi/error.h" /* PCI bridge subsystem vendor ID helper functions */ #define PCI_SSVID_SIZEOF 8 @@ -40,10 +41,13 @@ #define PCI_SSVID_SSID 6 int pci_bridge_ssvid_init(PCIDevice *dev, uint8_t offset, - uint16_t svid, uint16_t ssid) + uint16_t svid, uint16_t ssid, + Error **errp) { int pos; - pos = pci_add_capability(dev, PCI_CAP_ID_SSVID, offset, PCI_SSVID_SIZEOF); + + pos = pci_add_capability(dev, PCI_CAP_ID_SSVID, offset, + PCI_SSVID_SIZEOF, errp); if (pos < 0) { return pos; } |