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| author | Peter Maydell <peter.maydell@linaro.org> | 2022-12-16 15:55:26 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-12-16 15:55:32 +0000 |
| commit | 78e4d5cbaf472c60ebf0516816b2a38a78b48b0b (patch) | |
| tree | cd974c43dcac6f4e7c74a9a664bb6f0271f5a104 /hw/pci/pci_bridge.c | |
| parent | d170529d56170e401b559a1e6b053c2138b852cb (diff) | |
| download | focaccia-qemu-78e4d5cbaf472c60ebf0516816b2a38a78b48b0b.tar.gz focaccia-qemu-78e4d5cbaf472c60ebf0516816b2a38a78b48b0b.zip | |
pci: Use device_cold_reset() and bus_cold_reset()
In the PCI subsystem we currently use the legacy function qdev_reset_all() and qbus_reset_all(). These perform a recursive reset, starting from either a qbus or a qdev. However they do not permit any of the devices in the tree to use three-phase reset, because device reset goes through the device_legacy_reset() function that only calls the single DeviceClass::reset method. Switch to using the device_cold_reset() and bus_cold_reset() functions. These also perform a recursive reset, where first the children are reset and then finally the parent, but they use the new (...in 2020...) Resettable mechanism, which supports both the old style single-reset method and also the new 3-phase reset handling. This should be a no-behaviour-change commit which just reduces the use of a deprecated API. Commit created with: sed -i -e 's/qdev_reset_all/device_cold_reset/g;s/qbus_reset_all/bus_cold_reset/g' hw/pci/*.c Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/pci/pci_bridge.c')
| -rw-r--r-- | hw/pci/pci_bridge.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index da34c8ebcd..b2b180edd6 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -275,7 +275,7 @@ void pci_bridge_write_config(PCIDevice *d, newctl = pci_get_word(d->config + PCI_BRIDGE_CONTROL); if (~oldctl & newctl & PCI_BRIDGE_CTL_BUS_RESET) { /* Trigger hot reset on 0->1 transition. */ - qbus_reset_all(BUS(&s->sec_bus)); + bus_cold_reset(BUS(&s->sec_bus)); } } |