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authorMichael Tokarev <mjt@tls.msk.ru>2023-07-14 14:27:04 +0300
committerMichael Tokarev <mjt@tls.msk.ru>2023-09-20 07:54:34 +0300
commitf1c0cff8a28ac25f48ecaea672eb3d68250bb3c4 (patch)
treedb97cf9d628a18c15a28e0af6f92a818dbd80ef0 /hw/pci
parent2431f4f184339f679ff665c75e927fc24f7bd430 (diff)
downloadfocaccia-qemu-f1c0cff8a28ac25f48ecaea672eb3d68250bb3c4.tar.gz
focaccia-qemu-f1c0cff8a28ac25f48ecaea672eb3d68250bb3c4.zip
hw/pci: spelling fixes
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/pci')
-rw-r--r--hw/pci/pcie_aer.c2
-rw-r--r--hw/pci/shpc.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index 374d593ead..b68c7ecb49 100644
--- a/hw/pci/pcie_aer.c
+++ b/hw/pci/pcie_aer.c
@@ -324,7 +324,7 @@ static void pcie_aer_msg_root_port(PCIDevice *dev, const PCIEAERMsg *msg)
          * it isn't implemented in qemu right now.
          * So just discard the error for now.
          * OS which cares of aer would receive errors via
-         * native aer mechanims, so this wouldn't matter.
+         * native aer mechanisms, so this wouldn't matter.
          */
     }
 
diff --git a/hw/pci/shpc.c b/hw/pci/shpc.c
index e7bc7192f1..df7f370111 100644
--- a/hw/pci/shpc.c
+++ b/hw/pci/shpc.c
@@ -615,7 +615,7 @@ int shpc_init(PCIDevice *d, PCIBus *sec_bus, MemoryRegion *bar,
     }
     if (nslots > SHPC_MAX_SLOTS ||
         SHPC_IDX_TO_PCI(nslots) > PCI_SLOT_MAX) {
-        /* TODO: report an error mesage that makes sense. */
+        /* TODO: report an error message that makes sense. */
         return -EINVAL;
     }
     shpc->nslots = nslots;