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| author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-02-01 19:26:20 +0000 |
|---|---|---|
| committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-02-01 19:26:20 +0000 |
| commit | 173a543b36d0b2491438cf1dcc2c7bb34d59bb5c (patch) | |
| tree | 59856c5e715a8d56334c9dc1ccfba69f341a72fa /hw/piix_pci.c | |
| parent | 4ebcf884836887324848291032a385fe0df7b0af (diff) | |
| download | focaccia-qemu-173a543b36d0b2491438cf1dcc2c7bb34d59bb5c.tar.gz focaccia-qemu-173a543b36d0b2491438cf1dcc2c7bb34d59bb5c.zip | |
Add and use #defines for PCI device classes
This patch adds and uses #defines for PCI device classes and subclases, using a new pci_config_set_class() function, similar to the recently added pci_config_set_vendor_id() and pci_config_set_device_id(). Change since v1: fixed compilation of hw/sun4u.c Signed-off-by: Stuart Brady <stuart.brady@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6491 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/piix_pci.c')
| -rw-r--r-- | hw/piix_pci.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/hw/piix_pci.c b/hw/piix_pci.c index c5e73c2f8f..53e20a0ab8 100644 --- a/hw/piix_pci.c +++ b/hw/piix_pci.c @@ -195,8 +195,7 @@ PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic) pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_INTEL); pci_config_set_device_id(d->config, PCI_DEVICE_ID_INTEL_82441); d->config[0x08] = 0x02; // revision - d->config[0x0a] = 0x00; // class_sub = host2pci - d->config[0x0b] = 0x06; // class_base = PCI_bridge + pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST); d->config[0x0e] = 0x00; // header_type d->config[0x72] = 0x02; /* SMRAM */ @@ -337,8 +336,7 @@ int piix3_init(PCIBus *bus, int devfn) pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371SB_0); // 82371SB PIIX3 PCI-to-ISA bridge (Step A1) - pci_conf[0x0a] = 0x01; // class_sub = PCI_ISA - pci_conf[0x0b] = 0x06; // class_base = PCI_bridge + pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_ISA); pci_conf[0x0e] = 0x80; // header_type = PCI_multifunction, generic piix3_reset(d); @@ -359,8 +357,7 @@ int piix4_init(PCIBus *bus, int devfn) pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB_0); // 82371AB/EB/MB PIIX4 PCI-to-ISA bridge - pci_conf[0x0a] = 0x01; // class_sub = PCI_ISA - pci_conf[0x0b] = 0x06; // class_base = PCI_bridge + pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_ISA); pci_conf[0x0e] = 0x80; // header_type = PCI_multifunction, generic piix4_reset(d); |