diff options
| author | Cédric Le Goater <clg@kaod.org> | 2019-12-05 19:44:53 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2019-12-17 10:39:48 +1100 |
| commit | 8b50ce850538223b8dd2c2f4ed8a819d3c60bfc1 (patch) | |
| tree | 05911ade07950427f819c7fc7456b0103583450b /hw/ppc/pnv.c | |
| parent | c5412b1d28535f8a2c252c9b62634389b83cae48 (diff) | |
| download | focaccia-qemu-8b50ce850538223b8dd2c2f4ed8a819d3c60bfc1.tar.gz focaccia-qemu-8b50ce850538223b8dd2c2f4ed8a819d3c60bfc1.zip | |
ppc/pnv: add a PSI bridge model for POWER10
The POWER10 PSIHB controller is very similar to the one on POWER9. We should probably introduce a common PnvPsiXive object. The ESB page size should be changed to 64k when P10 support is ready. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191205184454.10722-5-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/pnv.c')
| -rw-r--r-- | hw/ppc/pnv.c | 27 |
1 files changed, 20 insertions, 7 deletions
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index d99cd72840..09263ab747 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -647,9 +647,9 @@ static void pnv_ipmi_bt_init(ISABus *bus, IPMIBmc *bmc, uint32_t irq) static void pnv_chip_power10_pic_print_info(PnvChip *chip, Monitor *mon) { - /* - * No interrupt controller yet - */; + Pnv10Chip *chip10 = PNV10_CHIP(chip); + + pnv_psi_pic_print_info(&chip10->psi, mon); } static void pnv_init(MachineState *machine) @@ -1311,16 +1311,17 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data) static void pnv_chip_power10_instance_init(Object *obj) { - /* - * No controllers yet - */ - ; + Pnv10Chip *chip10 = PNV10_CHIP(obj); + + object_initialize_child(obj, "psi", &chip10->psi, sizeof(chip10->psi), + TYPE_PNV10_PSI, &error_abort, NULL); } static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) { PnvChipClass *pcc = PNV_CHIP_GET_CLASS(dev); PnvChip *chip = PNV_CHIP(dev); + Pnv10Chip *chip10 = PNV10_CHIP(dev); Error *local_err = NULL; /* XSCOM bridge is first */ @@ -1336,6 +1337,18 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) error_propagate(errp, local_err); return; } + + /* Processor Service Interface (PSI) Host Bridge */ + object_property_set_int(OBJECT(&chip10->psi), PNV10_PSIHB_BASE(chip), + "bar", &error_fatal); + object_property_set_bool(OBJECT(&chip10->psi), true, "realized", + &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + pnv_xscom_add_subregion(chip, PNV10_XSCOM_PSIHB_BASE, + &PNV_PSI(&chip10->psi)->xscom_regs); } static void pnv_chip_power10_class_init(ObjectClass *klass, void *data) |