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| author | Cédric Le Goater <clg@kaod.org> | 2019-03-07 23:35:34 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2019-03-12 14:33:04 +1100 |
| commit | ae85605531cde2856d0b37804dc9a32028d89a34 (patch) | |
| tree | 264745ccbb72580e9e271ba6185aa83206ee0c19 /hw/ppc/pnv.c | |
| parent | 31bc6fa7fa8124ff8fb08373f9402985c806919f (diff) | |
| download | focaccia-qemu-ae85605531cde2856d0b37804dc9a32028d89a34.tar.gz focaccia-qemu-ae85605531cde2856d0b37804dc9a32028d89a34.zip | |
ppc/pnv: add a PSI bridge class model
To ease the introduction of the PSI bridge model for POWER9, abstract the POWER chip differences in a PnvPsi class model and introduce a specific Pnv8Psi type for POWER8. POWER8 interface to the interrupt controller is still XICS whereas POWER9 uses the new XIVE model. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190307223548.20516-2-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/pnv.c')
| -rw-r--r-- | hw/ppc/pnv.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 7660eaa22c..5bb2332f16 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -788,7 +788,7 @@ static void pnv_chip_power8_instance_init(Object *obj) Pnv8Chip *chip8 = PNV8_CHIP(obj); object_initialize_child(obj, "psi", &chip8->psi, sizeof(chip8->psi), - TYPE_PNV_PSI, &error_abort, NULL); + TYPE_PNV8_PSI, &error_abort, NULL); object_property_add_const_link(OBJECT(&chip8->psi), "xics", OBJECT(qdev_get_machine()), &error_abort); @@ -840,6 +840,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) PnvChipClass *pcc = PNV_CHIP_GET_CLASS(dev); PnvChip *chip = PNV_CHIP(dev); Pnv8Chip *chip8 = PNV8_CHIP(dev); + Pnv8Psi *psi8 = &chip8->psi; Error *local_err = NULL; pcc->parent_realize(dev, &local_err); @@ -856,7 +857,8 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) error_propagate(errp, local_err); return; } - pnv_xscom_add_subregion(chip, PNV_XSCOM_PSIHB_BASE, &chip8->psi.xscom_regs); + pnv_xscom_add_subregion(chip, PNV_XSCOM_PSIHB_BASE, + &PNV_PSI(psi8)->xscom_regs); /* Create LPC controller */ object_property_set_bool(OBJECT(&chip8->lpc), true, "realized", |