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authorCédric Le Goater <clg@kaod.org>2018-12-11 23:38:16 +0100
committerDavid Gibson <david@gibson.dropbear.id.au>2018-12-21 09:39:13 +1100
commit1c53b06c0309104f30ca2c5e1d1e89ddc38de080 (patch)
tree52f638547ccfffe79e2610867d5a27cafe8f123e /hw/ppc/spapr.c
parent1a937ad7e7a1b4eef37c967cbaeeda5ec5b90855 (diff)
downloadfocaccia-qemu-1c53b06c0309104f30ca2c5e1d1e89ddc38de080.tar.gz
focaccia-qemu-1c53b06c0309104f30ca2c5e1d1e89ddc38de080.zip
spapr: extend the sPAPR IRQ backend for XICS migration
Introduce a new sPAPR IRQ handler to handle resend after migration
when the machine is using a KVM XICS interrupt controller model.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/spapr.c')
-rw-r--r--hw/ppc/spapr.c13
1 files changed, 5 insertions, 8 deletions
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index dfb617e580..0b09a88753 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -1730,14 +1730,6 @@ static int spapr_post_load(void *opaque, int version_id)
         return err;
     }
 
-    if (!object_dynamic_cast(OBJECT(spapr->ics), TYPE_ICS_KVM)) {
-        CPUState *cs;
-        CPU_FOREACH(cs) {
-            PowerPCCPU *cpu = POWERPC_CPU(cs);
-            icp_resend(ICP(cpu->intc));
-        }
-    }
-
     /* In earlier versions, there was no separate qdev for the PAPR
      * RTC, so the RTC offset was stored directly in sPAPREnvironment.
      * So when migrating from those versions, poke the incoming offset
@@ -1758,6 +1750,11 @@ static int spapr_post_load(void *opaque, int version_id)
         }
     }
 
+    err = spapr_irq_post_load(spapr, version_id);
+    if (err) {
+        return err;
+    }
+
     return err;
 }