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authorFabien Chouteau <chouteau@adacore.com>2013-03-29 02:06:27 +0000
committerAlexander Graf <agraf@suse.de>2013-04-26 23:02:40 +0200
commit2cf3eb6df552cee74b52de9989e270b74e42847e (patch)
treed53444ebe7b7d442dbe874d34b873ef584b91189 /hw/ppc/spapr.c
parent3b961124bf8a0b490e4fc3a6a39e004500ae6967 (diff)
downloadfocaccia-qemu-2cf3eb6df552cee74b52de9989e270b74e42847e.tar.gz
focaccia-qemu-2cf3eb6df552cee74b52de9989e270b74e42847e.zip
PPC: Remove env->hreset_excp_prefix
This value is not needed if we use correctly the MSR[IP] bit.

excp_prefix is always 0x00000000, except when the MSR[IP] bit is
implemented and set to 1, in that case excp_prefix is 0xfff00000.

The handling of MSR[IP] was already implemented but not used at reset
because the value of env->msr was changed "manually".

The patch uses the function hreg_store_msr() to set env->msr, this
ensures a good handling of MSR[IP] at reset, and therefore a good value
for excp_prefix.

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw/ppc/spapr.c')
-rw-r--r--hw/ppc/spapr.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 7a425011da..e35c26f577 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -801,8 +801,10 @@ static void ppc_spapr_init(QEMUMachineInitArgs *args)
         /* Set time-base frequency to 512 MHz */
         cpu_ppc_tb_init(env, TIMEBASE_FREQ);
 
-        /* PAPR always has exception vectors in RAM not ROM */
-        env->hreset_excp_prefix = 0;
+        /* PAPR always has exception vectors in RAM not ROM. To ensure this,
+         * MSR[IP] should never be set.
+         */
+        env->msr_mask &= ~(1 << 6);
 
         /* Tell KVM that we're in PAPR mode */
         if (kvm_enabled()) {