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| author | Alexey Kardashevskiy <aik@ozlabs.ru> | 2020-03-10 16:07:31 +1100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2020-03-17 15:08:50 +1100 |
| commit | 395a20d3cc61fa99cf4ad58921050f8a44b369f9 (patch) | |
| tree | 3c95b6acd9c2509d818febd4057b006d4be79bda /hw/ppc/spapr_cpu_core.c | |
| parent | 94f040aaecf4e41cc68991b80204b1b6886bbdd0 (diff) | |
| download | focaccia-qemu-395a20d3cc61fa99cf4ad58921050f8a44b369f9.tar.gz focaccia-qemu-395a20d3cc61fa99cf4ad58921050f8a44b369f9.zip | |
ppc/spapr: Move GPRs setup to one place
At the moment "pseries" starts in SLOF which only expects the FDT blob pointer in r3. As we are going to introduce a OpenFirmware support in QEMU, we will be booting OF clients directly and these expect a stack pointer in r1, Linux looks at r3/r4 for the initramdisk location (although vmlinux can find this from the device tree but zImage from distro kernels cannot). This extends spapr_cpu_set_entry_state() to take more registers. This should cause no behavioral change. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Message-Id: <20200310050733.29805-2-aik@ozlabs.ru> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/spapr_cpu_core.c')
| -rw-r--r-- | hw/ppc/spapr_cpu_core.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 36ed3a2b66..ac1c109427 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -76,13 +76,17 @@ static void spapr_reset_vcpu(PowerPCCPU *cpu) spapr_irq_cpu_intc_reset(spapr, cpu); } -void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, target_ulong r3) +void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, + target_ulong r1, target_ulong r3, + target_ulong r4) { PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); CPUPPCState *env = &cpu->env; env->nip = nip; + env->gpr[1] = r1; env->gpr[3] = r3; + env->gpr[4] = r4; kvmppc_set_reg_ppc_online(cpu, 1); CPU(cpu)->halted = 0; /* Enable Power-saving mode Exit Cause exceptions */ |