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| author | Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> | 2016-09-20 22:05:01 +0530 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-09-23 12:39:07 +1000 |
| commit | d76ab5e1c7db5f064700b9c3cb0924ccfd9017e5 (patch) | |
| tree | 02a6851b90b0fe8d6cede2dd4c0041ee416336b3 /hw/ppc/spapr_hcall.c | |
| parent | e3cffe6fad29e07d401eabb913a6d88501d5c143 (diff) | |
| download | focaccia-qemu-d76ab5e1c7db5f064700b9c3cb0924ccfd9017e5.tar.gz focaccia-qemu-d76ab5e1c7db5f064700b9c3cb0924ccfd9017e5.zip | |
target-ppc: tlbie/tlbivax should have global effect
tlbie (BookS) and tlbivax (BookE) plus the H_CALLs(pseries) should have a global effect. Introduces TLB_NEED_GLOBAL_FLUSH flag. During lazy tlb flush, after taking care of pending local flushes, check broadcast flush(at context synchronizing event ptesync/tlbsync, etc) is needed. Depending on the bitmask state of the tlb_need_flush, tlb is flushed from other cpus if needed and the flags are cleared. Suggested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [dwg: Use 'true' instead of '1' for call to check_tlb_flush()] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/spapr_hcall.c')
| -rw-r--r-- | hw/ppc/spapr_hcall.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index 0884e3e8a8..290a7122d4 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -319,6 +319,8 @@ static target_ulong h_protect(PowerPCCPU *cpu, sPAPRMachineState *spapr, ppc_hash64_store_hpte(cpu, pte_index, (v & ~HPTE64_V_VALID) | HPTE64_V_HPTE_DIRTY, 0); ppc_hash64_tlb_flush_hpte(cpu, pte_index, v, r); + /* Flush the tlb */ + check_tlb_flush(env, true); /* Don't need a memory barrier, due to qemu's global lock */ ppc_hash64_store_hpte(cpu, pte_index, v | HPTE64_V_HPTE_DIRTY, r); return H_SUCCESS; |