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| author | Cédric Le Goater <clg@kaod.org> | 2019-01-02 06:57:34 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2019-01-09 09:28:14 +1100 |
| commit | 8fa1f4ef3828e71bfec1de2934c99e35c25709b6 (patch) | |
| tree | 4dd44e69fc7b5f903256d979df0ba1e678ddb0bd /hw/ppc/spapr_irq.c | |
| parent | a0c493ae67c8176bba0385aaab49d6129838b525 (diff) | |
| download | focaccia-qemu-8fa1f4ef3828e71bfec1de2934c99e35c25709b6.tar.gz focaccia-qemu-8fa1f4ef3828e71bfec1de2934c99e35c25709b6.zip | |
spapr: modify the prototype of the cpu_intc_create() method
Today, the interrupt presenter is linked to a CPU using the cpu_intc_create() method of the sPAPR IRQ backend. The resulting object is assigned to the PowerPCCPU 'intc' pointer whatever the interrupt mode, XICS or XIVE. To support the 'dual' interrupt mode, we will need to distinguish between the two presenter objects and for that, we plan to introduce a second interrupt presenter object pointer under the PowerPCCPU. The modifications below move the assignment of the presenter object under the cpu_intc_create() method to prepare ground for the future changes. Both sPAPR and PowerNV machines are impacted. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/spapr_irq.c')
| -rw-r--r-- | hw/ppc/spapr_irq.c | 34 |
1 files changed, 26 insertions, 8 deletions
diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index be5fe531a8..eca2317cf3 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -190,10 +190,20 @@ static void spapr_irq_print_info_xics(sPAPRMachineState *spapr, Monitor *mon) ics_pic_print_info(spapr->ics, mon); } -static Object *spapr_irq_cpu_intc_create_xics(sPAPRMachineState *spapr, - Object *cpu, Error **errp) +static void spapr_irq_cpu_intc_create_xics(sPAPRMachineState *spapr, + PowerPCCPU *cpu, Error **errp) { - return icp_create(cpu, spapr->icp_type, XICS_FABRIC(spapr), errp); + Error *local_err = NULL; + Object *obj; + + obj = icp_create(OBJECT(cpu), spapr->icp_type, XICS_FABRIC(spapr), + &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + cpu->intc = obj; } static int spapr_irq_post_load_xics(sPAPRMachineState *spapr, int version_id) @@ -311,17 +321,25 @@ static void spapr_irq_print_info_xive(sPAPRMachineState *spapr, spapr_xive_pic_print_info(spapr->xive, mon); } -static Object *spapr_irq_cpu_intc_create_xive(sPAPRMachineState *spapr, - Object *cpu, Error **errp) +static void spapr_irq_cpu_intc_create_xive(sPAPRMachineState *spapr, + PowerPCCPU *cpu, Error **errp) { - Object *obj = xive_tctx_create(cpu, XIVE_ROUTER(spapr->xive), errp); + Error *local_err = NULL; + Object *obj; + + obj = xive_tctx_create(OBJECT(cpu), XIVE_ROUTER(spapr->xive), &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + cpu->intc = obj; /* * (TCG) Early setting the OS CAM line for hotplugged CPUs as they - * don't benificiate from the reset of the XIVE IRQ backend + * don't beneficiate from the reset of the XIVE IRQ backend */ spapr_xive_set_tctx_os_cam(XIVE_TCTX(obj)); - return obj; } static int spapr_irq_post_load_xive(sPAPRMachineState *spapr, int version_id) |