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| author | Peter Maydell <peter.maydell@linaro.org> | 2017-07-25 10:04:39 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-07-25 10:04:39 +0100 |
| commit | 08cf4b5ed2bc9cf3afcd454909f92711850df928 (patch) | |
| tree | 9f8e36693f3dac59a64c0ce431bab04a529604e2 /hw/ppc/spapr_pci.c | |
| parent | b5a74cd81d76cb467552f38f2b39520d07c65ea2 (diff) | |
| parent | 86844c213348a596ea716a44a6f337555e07ad09 (diff) | |
| download | focaccia-qemu-08cf4b5ed2bc9cf3afcd454909f92711850df928.tar.gz focaccia-qemu-08cf4b5ed2bc9cf3afcd454909f92711850df928.zip | |
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.10-20170725' into staging
ppc patch queue 2017-07-25 Last pull request for the 2.10 hard freeze, and correspondingly small. There are a handful of bugfixes here plus an update for the "pseries" guest firmware (SLOF). This is later than ideal for a guest firmware update. However, this does include a number of fixes in that guest firmware, so I think it's worth the risk of squeezing this in just before the hard freeze. # gpg: Signature made Tue 25 Jul 2017 06:43:14 BST # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-2.10-20170725: pseries: Update SLOF firmware image spapr: Fix QEMU abort during memory unplug spapr/htab: fix savevm spapr_pci: Fix obsolete comment about MSIX encoding in addr/data Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/ppc/spapr_pci.c')
| -rw-r--r-- | hw/ppc/spapr_pci.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 6ecdf29d28..d84abf1070 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -723,9 +723,7 @@ static PCIINTxRoute spapr_route_intx_pin_to_irq(void *opaque, int pin) /* * MSI/MSIX memory region implementation. * The handler handles both MSI and MSIX. - * For MSI-X, the vector number is encoded as a part of the address, - * data is set to 0. - * For MSI, the vector number is encoded in least bits in data. + * The vector number is encoded in least bits in data. */ static void spapr_msi_write(void *opaque, hwaddr addr, uint64_t data, unsigned size) |