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authorDaniel Henrique Barboza <danielhb413@gmail.com>2022-06-24 05:49:18 -0300
committerDaniel Henrique Barboza <danielhb413@gmail.com>2022-08-31 14:08:05 -0300
commit17c681e92ddd66b8a5c425ea6a1c6ec3a4e079d4 (patch)
treeb56bcc937f89bc35dbcdf413871aed0ad933d0f3 /hw/ppc
parentc8d14603e998ee41313e989cec590c3ec8ddc923 (diff)
downloadfocaccia-qemu-17c681e92ddd66b8a5c425ea6a1c6ec3a4e079d4.tar.gz
focaccia-qemu-17c681e92ddd66b8a5c425ea6a1c6ec3a4e079d4.zip
ppc/pnv: remove root port name from pnv_phb_attach_root_port()
We support only a single root port, PNV_PHB_ROOT_PORT.

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <20220624084921.399219-10-danielhb413@gmail.com>
Diffstat (limited to 'hw/ppc')
-rw-r--r--hw/ppc/pnv.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 576c0013ed..6b94c373d1 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1195,11 +1195,12 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp)
  * QOM id. 'chip_id' is going to be used as PCIE chassis for the
  * root port.
  */
-void pnv_phb_attach_root_port(PCIHostState *pci, const char *name,
-                              int index, int chip_id)
+void pnv_phb_attach_root_port(PCIHostState *pci, int index, int chip_id)
 {
-    PCIDevice *root = pci_new(PCI_DEVFN(0, 0), name);
-    g_autofree char *default_id = g_strdup_printf("%s[%d]", name, index);
+    PCIDevice *root = pci_new(PCI_DEVFN(0, 0), TYPE_PNV_PHB_ROOT_PORT);
+    g_autofree char *default_id = g_strdup_printf("%s[%d]",
+                                                  TYPE_PNV_PHB_ROOT_PORT,
+                                                  index);
     const char *dev_id = DEVICE(root)->id;
 
     object_property_add_child(OBJECT(pci->bus), dev_id ? dev_id : default_id,