summary refs log tree commit diff stats
path: root/hw/ppc
diff options
context:
space:
mode:
authorNicholas Piggin <npiggin@gmail.com>2024-12-10 00:47:48 +1000
committerNicholas Piggin <npiggin@gmail.com>2025-03-11 22:43:30 +1000
commitfedbab2c512e8685c2ae87a05f8862e5e83f81ed (patch)
treee4321f99ae24a0ce42f9c3728073f65fec7d2f90 /hw/ppc
parent70bc5c2498f464b63515984f1996031010476c25 (diff)
downloadfocaccia-qemu-fedbab2c512e8685c2ae87a05f8862e5e83f81ed.tar.gz
focaccia-qemu-fedbab2c512e8685c2ae87a05f8862e5e83f81ed.zip
ppc/pnv/occ: Update pstate frequency tables
OCC pstate frequencies are in kHz, so the OCC data was 3-4MHz. Upgrade
to GHz. Make each pstate have a different frequency.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'hw/ppc')
-rw-r--r--hw/ppc/pnv_occ.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/hw/ppc/pnv_occ.c b/hw/ppc/pnv_occ.c
index 22b07a415a..19ccfe1bbf 100644
--- a/hw/ppc/pnv_occ.c
+++ b/hw/ppc/pnv_occ.c
@@ -682,11 +682,11 @@ static bool occ_init_homer_memory(PnvOCC *occ, Error **errp)
         static_data.v2.pstate_turbo = -1;
         static_data.v2.pstate_ultra_turbo = 0;
         static_data.v2.pstates[0].id = 0;
-        static_data.v2.pstates[1].freq_khz = cpu_to_be32(3000);
+        static_data.v2.pstates[1].freq_khz = cpu_to_be32(4000000);
         static_data.v2.pstates[1].id = -1;
-        static_data.v2.pstates[1].freq_khz = cpu_to_be32(3000);
+        static_data.v2.pstates[1].freq_khz = cpu_to_be32(3000000);
         static_data.v2.pstates[2].id = -2;
-        static_data.v2.pstates[2].freq_khz = cpu_to_be32(3000);
+        static_data.v2.pstates[2].freq_khz = cpu_to_be32(2000000);
         for (i = 0; i < chip->nr_cores; i++) {
             static_data.v2.core_max[i] = 1;
         }
@@ -702,11 +702,11 @@ static bool occ_init_homer_memory(PnvOCC *occ, Error **errp)
         static_data.v9.pstate_turbo = 1;
         static_data.v9.pstate_ultra_turbo = 0;
         static_data.v9.pstates[0].id = 0;
-        static_data.v9.pstates[0].freq_khz = cpu_to_be32(3000);
+        static_data.v9.pstates[0].freq_khz = cpu_to_be32(4000000);
         static_data.v9.pstates[1].id = 1;
-        static_data.v9.pstates[1].freq_khz = cpu_to_be32(3000);
+        static_data.v9.pstates[1].freq_khz = cpu_to_be32(3000000);
         static_data.v9.pstates[2].id = 2;
-        static_data.v9.pstates[2].freq_khz = cpu_to_be32(3000);
+        static_data.v9.pstates[2].freq_khz = cpu_to_be32(2000000);
         for (i = 0; i < chip->nr_cores; i++) {
             static_data.v9.core_max[i] = 1;
         }