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| author | Bharat Bhushan <r65777@freescale.com> | 2012-10-10 04:28:27 +0000 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2012-12-14 13:12:54 +0100 |
| commit | dffb1dc29fb364aaafc41b34100a06517d7f065e (patch) | |
| tree | e1082531680a7b92780c3a5f7cef54a3be9ea0e6 /hw/ppce500_pci.c | |
| parent | 4fd50339c0b55fa6387fa3c28f755c306997064c (diff) | |
| download | focaccia-qemu-dffb1dc29fb364aaafc41b34100a06517d7f065e.tar.gz focaccia-qemu-dffb1dc29fb364aaafc41b34100a06517d7f065e.zip | |
e500: Adding CCSR memory region
All devices are also placed under CCSR memory region. The CCSR memory region is exported to pci device. The MSI interrupt generation is the main reason to export the CCSR region to PCI device. This put the requirement to move mpic under CCSR region, but logically all devices should be under CCSR. So this patch places all emulated devices under ccsr region. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw/ppce500_pci.c')
0 files changed, 0 insertions, 0 deletions