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| author | Bin Meng <bin.meng@windriver.com> | 2020-07-02 20:21:51 -0700 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2020-07-13 17:25:37 -0700 |
| commit | 2c44bbf32cda5fbf85b697e3a12127f59d2c2e80 (patch) | |
| tree | 6f750f26ac604faf2a8f1938d52848b7a817cc8d /hw/riscv/boot.c | |
| parent | e92fb01639cadbeb9c6fc5d5189e35ef3e45836f (diff) | |
| download | focaccia-qemu-2c44bbf32cda5fbf85b697e3a12127f59d2c2e80.tar.gz focaccia-qemu-2c44bbf32cda5fbf85b697e3a12127f59d2c2e80.zip | |
hw/riscv: virt: Sort the SoC memmap table entries
Adjust the PCIe memory maps to follow the order. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1593746511-19517-1-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv/boot.c')
0 files changed, 0 insertions, 0 deletions