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| author | Tomasz Jeznach <tjeznach@rivosinc.com> | 2025-02-24 16:08:23 -0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2025-03-04 15:42:54 +1000 |
| commit | 4faa3e6f906c832f4c5382fbd618e368525ad2dc (patch) | |
| tree | 5be6f67ecd2b1634d77fde92a194b67364bbbc8c /hw/riscv/riscv-iommu-hpm.h | |
| parent | 91dd0bd0216f7a70e5e30cfc24eeea455b4f6993 (diff) | |
| download | focaccia-qemu-4faa3e6f906c832f4c5382fbd618e368525ad2dc.tar.gz focaccia-qemu-4faa3e6f906c832f4c5382fbd618e368525ad2dc.zip | |
hw/riscv/riscv-iommu: add hpm events mmio write
To support hpm events mmio writes, done via riscv_iommu_process_hpmevt_write(), we're also adding the 'hpm-counters' IOMMU property that are used to determine the amount of counters available in the IOMMU. Note that everything we did so far didn't change any IOMMU behavior because we're still not advertising HPM capability to software. This will be done in the next patch. Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250224190826.1858473-9-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv/riscv-iommu-hpm.h')
| -rw-r--r-- | hw/riscv/riscv-iommu-hpm.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/riscv/riscv-iommu-hpm.h b/hw/riscv/riscv-iommu-hpm.h index 0cd550975d..5fc4ef2e8b 100644 --- a/hw/riscv/riscv-iommu-hpm.h +++ b/hw/riscv/riscv-iommu-hpm.h @@ -28,5 +28,6 @@ void riscv_iommu_hpm_incr_ctr(RISCVIOMMUState *s, RISCVIOMMUContext *ctx, void riscv_iommu_hpm_timer_cb(void *priv); void riscv_iommu_process_iocntinh_cy(RISCVIOMMUState *s, bool prev_cy_inh); void riscv_iommu_process_hpmcycle_write(RISCVIOMMUState *s); +void riscv_iommu_process_hpmevt_write(RISCVIOMMUState *s, uint32_t evt_reg); #endif |