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authorZhenzhong Duan <zhenzhong.duan@intel.com>2025-06-06 17:24:06 +0800
committerPhilippe Mathieu-Daudé <philmd@linaro.org>2025-06-10 12:59:09 +0200
commit860bb8b925418f3ea55305da2a7387d8318ac00c (patch)
treef412bea65f7f5a73872284b1d3acc1402d881af6 /hw/riscv/riscv-iommu-pci.c
parent2f8f01ae3d6b7acae187d700d7358d9bb248a696 (diff)
downloadfocaccia-qemu-860bb8b925418f3ea55305da2a7387d8318ac00c.tar.gz
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hw/riscv/riscv-iommu: Remove definition of RISCVIOMMU[Pci|Sys]Class
RISCVIOMMUPciClass and RISCVIOMMUSysClass are defined with missed
parent class, class_init on them may corrupt their parent class
fields.

It's lucky that parent_realize and parent_phases are not initialized
or used until now, so just remove the definitions. They can be added
back when really necessary.

Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250606092406.229833-6-zhenzhong.duan@intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Diffstat (limited to 'hw/riscv/riscv-iommu-pci.c')
-rw-r--r--hw/riscv/riscv-iommu-pci.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/hw/riscv/riscv-iommu-pci.c b/hw/riscv/riscv-iommu-pci.c
index 1f44eef74e..cdb4a7a8f0 100644
--- a/hw/riscv/riscv-iommu-pci.c
+++ b/hw/riscv/riscv-iommu-pci.c
@@ -68,12 +68,6 @@ typedef struct RISCVIOMMUStatePci {
     RISCVIOMMUState  iommu;   /* common IOMMU state */
 } RISCVIOMMUStatePci;
 
-struct RISCVIOMMUPciClass {
-    /*< public >*/
-    DeviceRealize parent_realize;
-    ResettablePhases parent_phases;
-};
-
 /* interrupt delivery callback */
 static void riscv_iommu_pci_notify(RISCVIOMMUState *iommu, unsigned vector)
 {