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| author | Tomasz Jeznach <tjeznach@rivosinc.com> | 2025-02-24 16:08:20 -0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2025-03-04 15:42:54 +1000 |
| commit | ffb37df056490b34cecc7958bf5f83fe5497b2d4 (patch) | |
| tree | b0feb2ce68a5eccaef9dca2f87d41e0b4d5a6591 /hw/riscv/riscv-iommu.c | |
| parent | 11ecf24c7eda83bb92e24a81425ac6d33a63378e (diff) | |
| download | focaccia-qemu-ffb37df056490b34cecc7958bf5f83fe5497b2d4.tar.gz focaccia-qemu-ffb37df056490b34cecc7958bf5f83fe5497b2d4.zip | |
hw/riscv/riscv-iommu: instantiate hpm_timer
The next HPM related changes requires the HPM overflow timer to be initialized by the riscv-iommu base emulation. Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250224190826.1858473-6-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv/riscv-iommu.c')
| -rw-r--r-- | hw/riscv/riscv-iommu.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c index 0b15acf4e6..f26aa15f55 100644 --- a/hw/riscv/riscv-iommu.c +++ b/hw/riscv/riscv-iommu.c @@ -2382,6 +2382,8 @@ static void riscv_iommu_realize(DeviceState *dev, Error **errp) address_space_init(&s->trap_as, &s->trap_mr, "riscv-iommu-trap-as"); if (s->cap & RISCV_IOMMU_CAP_HPM) { + s->hpm_timer = + timer_new_ns(QEMU_CLOCK_VIRTUAL, riscv_iommu_hpm_timer_cb, s); s->hpm_event_ctr_map = g_hash_table_new(g_direct_hash, g_direct_equal); } } @@ -2395,6 +2397,7 @@ static void riscv_iommu_unrealize(DeviceState *dev) if (s->cap & RISCV_IOMMU_CAP_HPM) { g_hash_table_unref(s->hpm_event_ctr_map); + timer_free(s->hpm_timer); } } |