diff options
| author | Atish Patra <atish.patra@wdc.com> | 2020-07-01 11:39:48 -0700 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2020-07-13 17:25:37 -0700 |
| commit | dc144fe13d336caac2f03b57f1df738e84f984ec (patch) | |
| tree | 5376152bbe9d1416c435af13cf5795bce7450223 /hw/riscv/sifive_u.c | |
| parent | 66b1205bc5ab8bb3f5e12fa4155bbeb56e6724e9 (diff) | |
| download | focaccia-qemu-dc144fe13d336caac2f03b57f1df738e84f984ec.tar.gz focaccia-qemu-dc144fe13d336caac2f03b57f1df738e84f984ec.zip | |
riscv: Add opensbi firmware dynamic support
OpenSBI is the default firmware in Qemu and has various firmware loading options. Currently, qemu loader uses fw_jump which has a compile time pre-defined address where fdt & kernel image must reside. This puts a constraint on image size of the Linux kernel depending on the fdt location and available memory. However, fw_dynamic allows the loader to specify the next stage location (i.e. Linux kernel/U-Boot) in memory and other configurable boot options available in OpenSBI. Add support for OpenSBI dynamic firmware loading support. This doesn't break existing setup and fw_jump will continue to work as it is. Any other firmware will continue to work without any issues as long as it doesn't expect anything specific from loader in "a2" register. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Message-Id: <20200701183949.398134-4-atish.patra@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv/sifive_u.c')
| -rw-r--r-- | hw/riscv/sifive_u.c | 20 |
1 files changed, 15 insertions, 5 deletions
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 39923209f4..46e6ed90ca 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -380,6 +380,7 @@ static void sifive_u_machine_init(MachineState *machine) target_ulong start_addr = memmap[SIFIVE_U_DRAM].base; int i; uint32_t fdt_load_addr; + uint64_t kernel_entry; /* Initialize SoC */ object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_U_SOC); @@ -436,8 +437,7 @@ static void sifive_u_machine_init(MachineState *machine) riscv_find_and_load_firmware(machine, BIOS_FILENAME, start_addr, NULL); if (machine->kernel_filename) { - uint64_t kernel_entry = riscv_load_kernel(machine->kernel_filename, - NULL); + kernel_entry = riscv_load_kernel(machine->kernel_filename, NULL); if (machine->initrd_filename) { hwaddr start; @@ -449,6 +449,12 @@ static void sifive_u_machine_init(MachineState *machine) qemu_fdt_setprop_cell(s->fdt, "/chosen", "linux,initrd-end", end); } + } else { + /* + * If dynamic firmware is used, it doesn't know where is the next mode + * if kernel argument is not set. + */ + kernel_entry = 0; } /* Compute the fdt load address in dram */ @@ -458,7 +464,8 @@ static void sifive_u_machine_init(MachineState *machine) /* reset vector */ uint32_t reset_vec[11] = { s->msel, /* MSEL pin state */ - 0x00000297, /* 1: auipc t0, %pcrel_hi(dtb) */ + 0x00000297, /* 1: auipc t0, %pcrel_hi(fw_dyn) */ + 0x02828613, /* addi a2, t0, %pcrel_lo(1b) */ 0xf1402573, /* csrr a0, mhartid */ #if defined(TARGET_RISCV32) 0x0202a583, /* lw a1, 32(t0) */ @@ -468,12 +475,11 @@ static void sifive_u_machine_init(MachineState *machine) 0x0182b283, /* ld t0, 24(t0) */ #endif 0x00028067, /* jr t0 */ - 0x00000000, start_addr, /* start: .dword */ 0x00000000, fdt_load_addr, /* fdt_laddr: .dword */ 0x00000000, - /* dtb: */ + /* fw_dyn: */ }; /* copy in the reset vector in little_endian byte order */ @@ -482,6 +488,10 @@ static void sifive_u_machine_init(MachineState *machine) } rom_add_blob_fixed_as("mrom.reset", reset_vec, sizeof(reset_vec), memmap[SIFIVE_U_MROM].base, &address_space_memory); + + riscv_rom_copy_firmware_info(memmap[SIFIVE_U_MROM].base, + memmap[SIFIVE_U_MROM].size, + sizeof(reset_vec), kernel_entry); } static bool sifive_u_machine_get_start_in_flash(Object *obj, Error **errp) |