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authorBin Meng <bin.meng@windriver.com>2020-07-02 20:21:51 -0700
committerAlistair Francis <alistair.francis@wdc.com>2020-07-13 17:25:37 -0700
commit2c44bbf32cda5fbf85b697e3a12127f59d2c2e80 (patch)
tree6f750f26ac604faf2a8f1938d52848b7a817cc8d /hw/riscv/virt.c
parente92fb01639cadbeb9c6fc5d5189e35ef3e45836f (diff)
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hw/riscv: virt: Sort the SoC memmap table entries
Adjust the PCIe memory maps to follow the order.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1593746511-19517-1-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv/virt.c')
-rw-r--r--hw/riscv/virt.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index f7630c8a89..18283e262e 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -60,14 +60,14 @@ static const struct MemmapEntry {
     [VIRT_TEST] =        {   0x100000,        0x1000 },
     [VIRT_RTC] =         {   0x101000,        0x1000 },
     [VIRT_CLINT] =       {  0x2000000,       0x10000 },
+    [VIRT_PCIE_PIO] =    {  0x3000000,       0x10000 },
     [VIRT_PLIC] =        {  0xc000000,     0x4000000 },
     [VIRT_UART0] =       { 0x10000000,         0x100 },
     [VIRT_VIRTIO] =      { 0x10001000,        0x1000 },
     [VIRT_FLASH] =       { 0x20000000,     0x4000000 },
-    [VIRT_DRAM] =        { 0x80000000,           0x0 },
-    [VIRT_PCIE_MMIO] =   { 0x40000000,    0x40000000 },
-    [VIRT_PCIE_PIO] =    { 0x03000000,    0x00010000 },
     [VIRT_PCIE_ECAM] =   { 0x30000000,    0x10000000 },
+    [VIRT_PCIE_MMIO] =   { 0x40000000,    0x40000000 },
+    [VIRT_DRAM] =        { 0x80000000,           0x0 },
 };
 
 #define VIRT_FLASH_SECTOR_SIZE (256 * KiB)