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| author | Peter Maydell <peter.maydell@linaro.org> | 2019-11-26 12:36:40 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-11-26 12:36:40 +0000 |
| commit | 4ecc984210ca1bf508a96a550ec8a93a5f833f6c (patch) | |
| tree | 52447becb3534260d9f85fdd9d0f4b68b5b1d0ad /hw/riscv/virt.c | |
| parent | a5f80c16f204e1348ba6d4edfd6e9dbd7b4ccbc3 (diff) | |
| parent | 6478dd745dca49d63250500cd1aeca1c41cd6f89 (diff) | |
| download | focaccia-qemu-4ecc984210ca1bf508a96a550ec8a93a5f833f6c.tar.gz focaccia-qemu-4ecc984210ca1bf508a96a550ec8a93a5f833f6c.zip | |
Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.2-rc3' into staging
RISC-V Patches for 4.2-rc3 This tag contains two patches that I'd like to target for 4.2-rc3: * A fix to the DT entry for the SiFive test finisher. * A fix to the spike board's HTIF interface. This passes "make check" and boots OE for me. # gpg: Signature made Mon 25 Nov 2019 20:51:13 GMT # gpg: using RSA key 00CE76D1834960DFCE886DF8EF4CA1502CCBAB41 # gpg: issuer "palmer@dabbelt.com" # gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown] # gpg: aka "Palmer Dabbelt <palmer@sifive.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41 * remotes/palmer/tags/riscv-for-master-4.2-rc3: hw/riscv: Add optional symbol callback ptr to riscv_load_kernel() RISC-V: virt: This is a "sifive,test1" test finisher Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/riscv/virt.c')
| -rw-r--r-- | hw/riscv/virt.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 23f340df19..c44b865959 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -359,7 +359,10 @@ static void create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap, nodename = g_strdup_printf("/test@%lx", (long)memmap[VIRT_TEST].base); qemu_fdt_add_subnode(fdt, nodename); - qemu_fdt_setprop_string(fdt, nodename, "compatible", "sifive,test0"); + { + const char compat[] = "sifive,test1\0sifive,test0"; + qemu_fdt_setprop(fdt, nodename, "compatible", compat, sizeof(compat)); + } qemu_fdt_setprop_cells(fdt, nodename, "reg", 0x0, memmap[VIRT_TEST].base, 0x0, memmap[VIRT_TEST].size); @@ -476,7 +479,8 @@ static void riscv_virt_board_init(MachineState *machine) memmap[VIRT_DRAM].base); if (machine->kernel_filename) { - uint64_t kernel_entry = riscv_load_kernel(machine->kernel_filename); + uint64_t kernel_entry = riscv_load_kernel(machine->kernel_filename, + NULL); if (machine->initrd_filename) { hwaddr start; |