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authorPeter Maydell <peter.maydell@linaro.org>2020-09-24 15:28:26 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-09-24 15:28:26 +0100
commitf7f1d916b22306c35ab9c090aab5233a91b4b7f9 (patch)
tree223f1864a618983e58e6ef1d7df2750d2ea28498 /hw/riscv
parentc122bca9cd7b986be4d473240a4fec6315b7a2c2 (diff)
parent418b473e8f586247475e8adc5d048598e5721361 (diff)
downloadfocaccia-qemu-f7f1d916b22306c35ab9c090aab5233a91b4b7f9.tar.gz
focaccia-qemu-f7f1d916b22306c35ab9c090aab5233a91b4b7f9.zip
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
machine + QOM queue, 2020-09-22

QOM cleanups:
* Convert instance properties to class properties
  (Eduardo Habkost)
* simplify object_find_property / object_class_find_property
  (Daniel P. Berrangé)

Deprecated feature removal:
* Drop support for invalid topologies (Igor Mammedov)

# gpg: Signature made Tue 22 Sep 2020 23:25:01 BST
# gpg:                using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6
# gpg:                issuer "ehabkost@redhat.com"
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full]
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/machine-next-pull-request:
  sifive_u: Register "start-in-flash" as class property
  sifive_e: Register "revb" as class property
  i440fx: Register i440FX-pcihost properties as class properties
  machine: Register "memory-backend" as class property
  xlnx-zcu102: Register properties as class properties
  cpu/core: Register core-id and nr-threads as class properties
  s390x: Register all CPU properties as class properties
  cryptodev-backend: Register "chardev" as class property
  cryptodev-vhost-user: Register "chardev" as class property
  smp: drop support for deprecated (invalid topologies)
  qom: simplify object_find_property / object_class_find_property

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/riscv')
-rw-r--r--hw/riscv/sifive_e.c11
-rw-r--r--hw/riscv/sifive_u.c16
2 files changed, 14 insertions, 13 deletions
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index 759059cd7b..fcfac16816 100644
--- a/hw/riscv/sifive_e.c
+++ b/hw/riscv/sifive_e.c
@@ -137,11 +137,6 @@ static void sifive_e_machine_instance_init(Object *obj)
     SiFiveEState *s = RISCV_E_MACHINE(obj);
 
     s->revb = false;
-    object_property_add_bool(obj, "revb", sifive_e_machine_get_revb,
-                             sifive_e_machine_set_revb);
-    object_property_set_description(obj, "revb",
-                                    "Set on to tell QEMU that it should model "
-                                    "the revB HiFive1 board");
 }
 
 static void sifive_e_machine_class_init(ObjectClass *oc, void *data)
@@ -152,6 +147,12 @@ static void sifive_e_machine_class_init(ObjectClass *oc, void *data)
     mc->init = sifive_e_machine_init;
     mc->max_cpus = 1;
     mc->default_cpu_type = SIFIVE_E_CPU;
+
+    object_class_property_add_bool(oc, "revb", sifive_e_machine_get_revb,
+                                   sifive_e_machine_set_revb);
+    object_class_property_set_description(oc, "revb",
+                                          "Set on to tell QEMU that it should model "
+                                          "the revB HiFive1 board");
 }
 
 static const TypeInfo sifive_e_machine_typeinfo = {
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index a97637fb33..6ad975d692 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -568,14 +568,6 @@ static void sifive_u_machine_instance_init(Object *obj)
     SiFiveUState *s = RISCV_U_MACHINE(obj);
 
     s->start_in_flash = false;
-    object_property_add_bool(obj, "start-in-flash",
-                             sifive_u_machine_get_start_in_flash,
-                             sifive_u_machine_set_start_in_flash);
-    object_property_set_description(obj, "start-in-flash",
-                                    "Set on to tell QEMU's ROM to jump to "
-                                    "flash. Otherwise QEMU will jump to DRAM "
-                                    "or L2LIM depending on the msel value");
-
     s->msel = 0;
     object_property_add(obj, "msel", "uint32",
                         sifive_u_machine_get_uint32_prop,
@@ -599,6 +591,14 @@ static void sifive_u_machine_class_init(ObjectClass *oc, void *data)
     mc->max_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + SIFIVE_U_COMPUTE_CPU_COUNT;
     mc->min_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + 1;
     mc->default_cpus = mc->min_cpus;
+
+    object_class_property_add_bool(oc, "start-in-flash",
+                                   sifive_u_machine_get_start_in_flash,
+                                   sifive_u_machine_set_start_in_flash);
+    object_class_property_set_description(oc, "start-in-flash",
+                                          "Set on to tell QEMU's ROM to jump to "
+                                          "flash. Otherwise QEMU will jump to DRAM "
+                                          "or L2LIM depending on the msel value");
 }
 
 static const TypeInfo sifive_u_machine_typeinfo = {