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authorPeter Maydell <peter.maydell@linaro.org>2022-01-22 18:24:41 +0000
committerPeter Maydell <peter.maydell@linaro.org>2022-01-28 14:29:47 +0000
commit0ffe88e6919d210c806078aaf0c34911554f1438 (patch)
treee6e4583957002765062c1f3f15cbf55bbcb37334 /hw/rtc/goldfish_rtc.c
parent7e062b98a2541ca9a632160aadbe8574c8bdce24 (diff)
downloadfocaccia-qemu-0ffe88e6919d210c806078aaf0c34911554f1438.tar.gz
focaccia-qemu-0ffe88e6919d210c806078aaf0c34911554f1438.zip
hw/intc/arm_gicv3_its: Make GITS_BASER<n> RAZ/WI for unimplemented registers
The ITS has a bank of 8 GITS_BASER<n> registers, which allow the
guest to specify the base address of various data tables.  Each
register has a read-only type field indicating which table it is for
and a read-write field where the guest can write in the base address
(among other things).  We currently allow the guest to write the
writeable fields for all eight registers, even if the type field is 0
indicating "Unimplemented".  This means the guest can provoke QEMU
into asserting by writing an address into one of these unimplemented
base registers, which bypasses the "if (!value) continue" check in
extract_table_params() and lets us hit the assertion that the type
field is one of the permitted table types.

Prevent the assertion by not allowing the guest to write to the
unimplemented base registers. This means their value will remain 0
and extract_table_params() will ignore them.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220122182444.724087-12-peter.maydell@linaro.org
Diffstat (limited to 'hw/rtc/goldfish_rtc.c')
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