diff options
| author | Pierre Morel <pmorel@linux.vnet.ibm.com> | 2015-07-15 16:16:20 +0200 |
|---|---|---|
| committer | Cornelia Huck <cornelia.huck@de.ibm.com> | 2015-09-07 16:10:42 +0200 |
| commit | fde8206b8061f808c880709c2ac26a645b11c211 (patch) | |
| tree | 67c5f76e9e7deffc7d03444ccabf9937f8c01db8 /hw/s390x/css.c | |
| parent | 4169198617dc8d3e80697964b91eaea551e7f956 (diff) | |
| download | focaccia-qemu-fde8206b8061f808c880709c2ac26a645b11c211.tar.gz focaccia-qemu-fde8206b8061f808c880709c2ac26a645b11c211.zip | |
s390x/css: handle ccw-0 TIC correctly
In CCW-0 format TIC command 4 highest bits are ignored in the subchannel. In CCW-1 format the TIC command 4 highest bits must be 0. To convert TIC from CCW-0 to CCW-1 we clear the 4 highest bits to guarantee compatibility. Signed-off-by: Pierre Morel <pmorel@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Diffstat (limited to 'hw/s390x/css.c')
| -rw-r--r-- | hw/s390x/css.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/s390x/css.c b/hw/s390x/css.c index 5df450e00b..2c0782cc6a 100644 --- a/hw/s390x/css.c +++ b/hw/s390x/css.c @@ -261,6 +261,9 @@ static CCW1 copy_ccw_from_guest(hwaddr addr, bool fmt1) ret.flags = tmp0.flags; ret.count = be16_to_cpu(tmp0.count); ret.cda = be16_to_cpu(tmp0.cda1) | (tmp0.cda0 << 16); + if ((ret.cmd_code & 0x0f) == CCW_CMD_TIC) { + ret.cmd_code &= 0x0f; + } } return ret; } |