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| author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2024-01-12 12:53:51 +0000 |
|---|---|---|
| committer | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2024-02-13 19:37:28 +0000 |
| commit | a4608fa0a5148dbb10f8ac473051ec326ffd71f7 (patch) | |
| tree | f917a45c84e00581beedacea333343245161ad81 /hw/scsi | |
| parent | 8bb224958545deb7f7d64289ccf491da640c1159 (diff) | |
| download | focaccia-qemu-a4608fa0a5148dbb10f8ac473051ec326ffd71f7.tar.gz focaccia-qemu-a4608fa0a5148dbb10f8ac473051ec326ffd71f7.zip | |
esp.c: separate logic based upon ESP command in esp_transfer_data()
The handling of the INTR_FC and INTR_BS bits is different depending upon the last command executed by the ESP. Note that currently INTR_FC is managed elsewhere, but that will change soon. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-60-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Diffstat (limited to 'hw/scsi')
| -rw-r--r-- | hw/scsi/esp.c | 32 |
1 files changed, 26 insertions, 6 deletions
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index 75538f5859..b6cf1b43db 100644 --- a/hw/scsi/esp.c +++ b/hw/scsi/esp.c @@ -862,13 +862,33 @@ void esp_transfer_data(SCSIRequest *req, uint32_t len) s->async_buf = scsi_req_get_buf(req); if (!to_device && !s->data_ready) { - /* - * Initial incoming data xfer is complete so raise command - * completion interrupt - */ s->data_ready = true; - s->rregs[ESP_RINTR] |= INTR_BS; - esp_raise_irq(s); + + switch (s->rregs[ESP_CMD]) { + case CMD_SEL | CMD_DMA: + case CMD_SEL: + case CMD_SELATN | CMD_DMA: + case CMD_SELATN: + case CMD_SELATNS | CMD_DMA: + case CMD_SELATNS: + /* + * Initial incoming data xfer is complete so raise command + * completion interrupt + */ + s->rregs[ESP_RINTR] |= INTR_BS; + esp_raise_irq(s); + break; + + case CMD_TI | CMD_DMA: + case CMD_TI: + /* + * Bus service interrupt raised because of initial change to + * DATA phase + */ + s->rregs[ESP_RINTR] |= INTR_BS; + esp_raise_irq(s); + break; + } } /* |