diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2021-10-22 09:02:12 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-10-22 09:02:12 -0700 |
| commit | eb8f1d57bd754b19da73bb316e80bbaf9b66103a (patch) | |
| tree | 2b5eec2e06db08fe4e19d87e2ee209638d6dd782 /hw/sd/aspeed_sdhci.c | |
| parent | 1dafe7656a9c2770065e91208edd4c073f5f98a9 (diff) | |
| parent | b12fa6118f4d838d19720ec6476a1666a1b43474 (diff) | |
| download | focaccia-qemu-eb8f1d57bd754b19da73bb316e80bbaf9b66103a.tar.gz focaccia-qemu-eb8f1d57bd754b19da73bb316e80bbaf9b66103a.zip | |
Merge remote-tracking branch 'remotes/clg/tags/pull-aspeed-20211022' into staging
Aspeed patches : * New fp5280g2-bmc board (John) * Small cleanup in Aspeed SMC model (Cedric) # gpg: Signature made Fri 22 Oct 2021 12:55:18 AM PDT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * remotes/clg/tags/pull-aspeed-20211022: speed/sdhci: Add trace events aspeed/smc: Use a container for the flash mmio address space aspeed: Add support for the fp5280g2-bmc board Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/sd/aspeed_sdhci.c')
| -rw-r--r-- | hw/sd/aspeed_sdhci.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/hw/sd/aspeed_sdhci.c b/hw/sd/aspeed_sdhci.c index 3299844de6..df1bdf1fa4 100644 --- a/hw/sd/aspeed_sdhci.c +++ b/hw/sd/aspeed_sdhci.c @@ -14,6 +14,7 @@ #include "hw/irq.h" #include "migration/vmstate.h" #include "hw/qdev-properties.h" +#include "trace.h" #define ASPEED_SDHCI_INFO 0x00 #define ASPEED_SDHCI_INFO_SLOT1 (1 << 17) @@ -60,6 +61,8 @@ static uint64_t aspeed_sdhci_read(void *opaque, hwaddr addr, unsigned int size) } } + trace_aspeed_sdhci_read(addr, size, (uint64_t) val); + return (uint64_t)val; } @@ -68,6 +71,8 @@ static void aspeed_sdhci_write(void *opaque, hwaddr addr, uint64_t val, { AspeedSDHCIState *sdhci = opaque; + trace_aspeed_sdhci_write(addr, size, val); + switch (addr) { case ASPEED_SDHCI_INFO: /* The RESET bit automatically clears. */ |