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authorPeter Maydell <peter.maydell@linaro.org>2020-02-25 13:31:16 +0000
committerPeter Maydell <peter.maydell@linaro.org>2020-02-25 13:31:16 +0000
commitdb736e0437aa6fd7c1b7e4599c17f9619ab6b837 (patch)
treed34751ef2c77e5fbc83c19e814c4413b0fa2618a /hw/sd/sdhci.c
parent9a8abceb5f01d1066d3a1ac5a33aabcbaeec1860 (diff)
parent9e264985ff0bc86927b44b334bd504687f78659d (diff)
downloadfocaccia-qemu-db736e0437aa6fd7c1b7e4599c17f9619ab6b837.tar.gz
focaccia-qemu-db736e0437aa6fd7c1b7e4599c17f9619ab6b837.zip
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
* device_del fix (Julia)
* FXAM fix (myself)
* memdev refactoring (Igor)
* memory region API cleanups (Peter, Philippe)
* ioeventfd optimization (Stefan)
* new WHPX maintainer (Sunil)
* Large guest startup optimizations (Chen)

# gpg: Signature made Tue 25 Feb 2020 12:42:24 GMT
# gpg:                using RSA key BFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream: (104 commits)
  WHPX: Assigning maintainer for Windows Hypervisor Platform
  accel/kvm: Check ioctl(KVM_SET_USER_MEMORY_REGION) return value
  target/i386: check for empty register in FXAM
  qdev-monitor: Forbid repeated device_del
  mem-prealloc: optimize large guest startup
  memory: batch allocate ioeventfds[] in address_space_update_ioeventfds()
  Avoid cpu_physical_memory_rw() with a constant is_write argument
  Let cpu_[physical]_memory() calls pass a boolean 'is_write' argument
  exec: Let cpu_[physical]_memory API use a boolean 'is_write' argument
  Avoid address_space_rw() with a constant is_write argument
  Let address_space_rw() calls pass a boolean 'is_write' argument
  exec: Let address_space_unmap() use a boolean 'is_write' argument
  hw/virtio: Let vhost_memory_map() use a boolean 'is_write' argument
  hw/virtio: Let virtqueue_map_iovec() use a boolean 'is_write' argument
  hw/ide: Let the DMAIntFunc prototype use a boolean 'is_write' argument
  hw/ide/internal: Remove unused DMARestartFunc typedef
  Remove unnecessary cast when using the cpu_[physical]_memory API
  exec: Let the cpu_[physical]_memory API use void pointer arguments
  Remove unnecessary cast when using the address_space API
  hw/net: Avoid casting non-const pointer, use address_space_write()
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/sd/sdhci.c')
-rw-r--r--hw/sd/sdhci.c15
1 files changed, 5 insertions, 10 deletions
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 69dc3e6b90..de63ffb037 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -701,8 +701,7 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
     hwaddr entry_addr = (hwaddr)s->admasysaddr;
     switch (SDHC_DMA_TYPE(s->hostctl1)) {
     case SDHC_CTRL_ADMA2_32:
-        dma_memory_read(s->dma_as, entry_addr, (uint8_t *)&adma2,
-                        sizeof(adma2));
+        dma_memory_read(s->dma_as, entry_addr, &adma2, sizeof(adma2));
         adma2 = le64_to_cpu(adma2);
         /* The spec does not specify endianness of descriptor table.
          * We currently assume that it is LE.
@@ -713,8 +712,7 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
         dscr->incr = 8;
         break;
     case SDHC_CTRL_ADMA1_32:
-        dma_memory_read(s->dma_as, entry_addr, (uint8_t *)&adma1,
-                        sizeof(adma1));
+        dma_memory_read(s->dma_as, entry_addr, &adma1, sizeof(adma1));
         adma1 = le32_to_cpu(adma1);
         dscr->addr = (hwaddr)(adma1 & 0xFFFFF000);
         dscr->attr = (uint8_t)extract32(adma1, 0, 7);
@@ -726,13 +724,10 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
         }
         break;
     case SDHC_CTRL_ADMA2_64:
-        dma_memory_read(s->dma_as, entry_addr,
-                        (uint8_t *)(&dscr->attr), 1);
-        dma_memory_read(s->dma_as, entry_addr + 2,
-                        (uint8_t *)(&dscr->length), 2);
+        dma_memory_read(s->dma_as, entry_addr, &dscr->attr, 1);
+        dma_memory_read(s->dma_as, entry_addr + 2, &dscr->length, 2);
         dscr->length = le16_to_cpu(dscr->length);
-        dma_memory_read(s->dma_as, entry_addr + 4,
-                        (uint8_t *)(&dscr->addr), 8);
+        dma_memory_read(s->dma_as, entry_addr + 4, &dscr->addr, 8);
         dscr->addr = le64_to_cpu(dscr->addr);
         dscr->attr &= (uint8_t) ~0xC0;
         dscr->incr = 12;