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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-06-14 16:09:26 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-06-16 14:33:52 +0100 |
| commit | dbcf6f9367a6a4af05b18cf0d7badf7677f403c4 (patch) | |
| tree | 3969e4b2ce66b4113fda93eae7fe9d364348ee70 /hw/sensor/tmp421.c | |
| parent | 77f96148f3f6c4106a2a3cee8146690f954fd6cd (diff) | |
| download | focaccia-qemu-dbcf6f9367a6a4af05b18cf0d7badf7677f403c4.tar.gz focaccia-qemu-dbcf6f9367a6a4af05b18cf0d7badf7677f403c4.zip | |
bitops.h: Provide hswap32(), hswap64(), wswap64() swapping operations
Currently the ARM SVE helper code defines locally some utility functions for swapping 16-bit halfwords within 32-bit or 64-bit values and for swapping 32-bit words within 64-bit values, parallel to the byte-swapping bswap16/32/64 functions. We want these also for the ARM MVE code, and they're potentially generally useful for other targets, so move them to bitops.h. (We don't put them in bswap.h with the bswap* functions because they are implemented in terms of the rotate operations also defined in bitops.h, and including bitops.h from bswap.h seems better avoided.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210614151007.4545-17-peter.maydell@linaro.org
Diffstat (limited to 'hw/sensor/tmp421.c')
0 files changed, 0 insertions, 0 deletions