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authorAndreas Färber <afaerber@suse.de>2013-04-09 16:51:24 +0200
committerAurelien Jarno <aurelien@aurel32.net>2013-04-13 13:51:45 +0200
commit2f493fee18a62104caddfabaa2712b076528cede (patch)
treec6a22f2c8f6b8dc6dfb457cb4ed1ad1a0ced02bb /hw/sh4/shix.c
parent06f3ed26983a04df74729d748a7b05400d8f3386 (diff)
downloadfocaccia-qemu-2f493fee18a62104caddfabaa2712b076528cede.tar.gz
focaccia-qemu-2f493fee18a62104caddfabaa2712b076528cede.zip
sh7750: Change cpu field type to SuperHCPU
This brings us a step closer to QOM'ified SH7750 SoC and
fixes b350ab75 (target-sh4: Move PVR/PRR/CVR into SuperHCPUClass)
assuming SuperHCPU type for SUPERH_CPU_GET_CLASS().

Fix Coding Style issues while at it (indentation, braces).

Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'hw/sh4/shix.c')
-rw-r--r--hw/sh4/shix.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/sh4/shix.c b/hw/sh4/shix.c
index f5cfef9e3b..ffac621a8c 100644
--- a/hw/sh4/shix.c
+++ b/hw/sh4/shix.c
@@ -41,7 +41,7 @@ static void shix_init(QEMUMachineInitArgs *args)
 {
     const char *cpu_model = args->cpu_model;
     int ret;
-    CPUSH4State *env;
+    SuperHCPU *cpu;
     struct SH7750State *s;
     MemoryRegion *sysmem = get_system_memory();
     MemoryRegion *rom = g_new(MemoryRegion, 1);
@@ -51,8 +51,8 @@ static void shix_init(QEMUMachineInitArgs *args)
         cpu_model = "any";
 
     printf("Initializing CPU\n");
-    env = cpu_init(cpu_model);
-    if (env == NULL) {
+    cpu = cpu_sh4_init(cpu_model);
+    if (cpu == NULL) {
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
@@ -85,7 +85,7 @@ static void shix_init(QEMUMachineInitArgs *args)
     }
 
     /* Register peripherals */
-    s = sh7750_init(env, sysmem);
+    s = sh7750_init(cpu, sysmem);
     /* XXXXX Check success */
     tc58128_init(s, "shix_linux_nand.bin", NULL);
     fprintf(stderr, "initialization terminated\n");