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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-23 21:47:51 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-23 21:47:51 +0000
commit3f582262e5443ded25ba6c8f016a114279a3b59f (patch)
tree5604a51f782ca8d8062ee175db5a07a772d095df /hw/smbus.h
parent209a4e691d230b01cf44c9f954a34db04d5708be (diff)
downloadfocaccia-qemu-3f582262e5443ded25ba6c8f016a114279a3b59f.tar.gz
focaccia-qemu-3f582262e5443ded25ba6c8f016a114279a3b59f.zip
Implement the PXA2xx I2C master controller.
Fix PXA270-specific timers and make minor changes in other PXA parts.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2853 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/smbus.h')
-rw-r--r--hw/smbus.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/smbus.h b/hw/smbus.h
index 9125896cc9..36977731ef 100644
--- a/hw/smbus.h
+++ b/hw/smbus.h
@@ -37,7 +37,7 @@ struct SMBusDevice {
        (if present).  The device is responsible figuring out what type of
        command  this is.  */
     void (*write_data)(SMBusDevice *dev, uint8_t cmd, uint8_t *buf, int len);
-    /* Likewise we can't distinguish between defferent reads, or even know
+    /* Likewise we can't distinguish between different reads, or even know
        the length of the read until the read is complete, so read data a
        byte at a time.  The device is responsible for adding the length
        byte on block reads.  */