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| author | David Gibson <david@gibson.dropbear.id.au> | 2011-04-01 15:15:18 +1100 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2011-04-01 18:34:55 +0200 |
| commit | cdaee00633cfac7338d8dd0ba3e8766d5bdb1cec (patch) | |
| tree | c961c7c035d9a1a3c46b5a18cd0df05793bf89e8 /hw/spapr.c | |
| parent | 256cebe5d17477cd1443f47a9bd5ca35ca0dbc9c (diff) | |
| download | focaccia-qemu-cdaee00633cfac7338d8dd0ba3e8766d5bdb1cec.tar.gz focaccia-qemu-cdaee00633cfac7338d8dd0ba3e8766d5bdb1cec.zip | |
Support 1T segments on ppc
Traditionally, the "segments" used for the two-stage translation used on powerpc MMUs were 256MB in size. This was the only option on all hash page table based 32-bit powerpc cpus, and on the earlier 64-bit hash page table based cpus. However, newer 64-bit cpus also permit 1TB segments This patch adds support for 1TB segment translation to the qemu code. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw/spapr.c')
0 files changed, 0 insertions, 0 deletions