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authormalc <av1474@comtv.ru>2009-10-01 22:20:47 +0400
committermalc <av1474@comtv.ru>2009-10-01 22:45:02 +0400
commit99a0949b720a0936da2052cb9a46db04ffc6db29 (patch)
treef9e39633853e35b49fc4465337cc196b9650866e /hw/tc6393xb.c
parentbc6291a1b95a2c4c546fde6e5cb4c68366f06649 (diff)
downloadfocaccia-qemu-99a0949b720a0936da2052cb9a46db04ffc6db29.tar.gz
focaccia-qemu-99a0949b720a0936da2052cb9a46db04ffc6db29.zip
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the time
being.

Signed-off-by: malc <av1474@comtv.ru>
Diffstat (limited to 'hw/tc6393xb.c')
-rw-r--r--hw/tc6393xb.c26
1 files changed, 13 insertions, 13 deletions
diff --git a/hw/tc6393xb.c b/hw/tc6393xb.c
index e0c5e5f087..103f5bc50c 100644
--- a/hw/tc6393xb.c
+++ b/hw/tc6393xb.c
@@ -122,7 +122,7 @@ struct TC6393xbState {
     ECCState ecc;
 
     DisplayState *ds;
-    ram_addr_t vram_addr;
+    a_ram_addr vram_addr;
     uint16_t *vram_ptr;
     uint32_t scr_width, scr_height; /* in pixels */
     qemu_irq l3v;
@@ -211,7 +211,7 @@ static void tc6393xb_sub_irq(void *opaque, int line, int level) {
     case SCR_ ##N(1): return s->scr.N[1];       \
     case SCR_ ##N(2): return s->scr.N[2]
 
-static uint32_t tc6393xb_scr_readb(TC6393xbState *s, target_phys_addr_t addr)
+static uint32_t tc6393xb_scr_readb(TC6393xbState *s, a_target_phys_addr addr)
 {
     switch (addr) {
         case SCR_REVID:
@@ -272,7 +272,7 @@ static uint32_t tc6393xb_scr_readb(TC6393xbState *s, target_phys_addr_t addr)
     case SCR_ ##N(1): s->scr.N[1] = value; return;   \
     case SCR_ ##N(2): s->scr.N[2] = value; return
 
-static void tc6393xb_scr_writeb(TC6393xbState *s, target_phys_addr_t addr, uint32_t value)
+static void tc6393xb_scr_writeb(TC6393xbState *s, a_target_phys_addr addr, uint32_t value)
 {
     switch (addr) {
         SCR_REG_B(ISR);
@@ -323,7 +323,7 @@ static void tc6393xb_nand_irq(TC6393xbState *s) {
             (s->nand.imr & 0x80) && (s->nand.imr & s->nand.isr));
 }
 
-static uint32_t tc6393xb_nand_cfg_readb(TC6393xbState *s, target_phys_addr_t addr) {
+static uint32_t tc6393xb_nand_cfg_readb(TC6393xbState *s, a_target_phys_addr addr) {
     switch (addr) {
         case NAND_CFG_COMMAND:
             return s->nand_enable ? 2 : 0;
@@ -336,7 +336,7 @@ static uint32_t tc6393xb_nand_cfg_readb(TC6393xbState *s, target_phys_addr_t add
     fprintf(stderr, "tc6393xb_nand_cfg: unhandled read at %08x\n", (uint32_t) addr);
     return 0;
 }
-static void tc6393xb_nand_cfg_writeb(TC6393xbState *s, target_phys_addr_t addr, uint32_t value) {
+static void tc6393xb_nand_cfg_writeb(TC6393xbState *s, a_target_phys_addr addr, uint32_t value) {
     switch (addr) {
         case NAND_CFG_COMMAND:
             s->nand_enable = (value & 0x2);
@@ -353,7 +353,7 @@ static void tc6393xb_nand_cfg_writeb(TC6393xbState *s, target_phys_addr_t addr,
 					(uint32_t) addr, value & 0xff);
 }
 
-static uint32_t tc6393xb_nand_readb(TC6393xbState *s, target_phys_addr_t addr) {
+static uint32_t tc6393xb_nand_readb(TC6393xbState *s, a_target_phys_addr addr) {
     switch (addr) {
         case NAND_DATA + 0:
         case NAND_DATA + 1:
@@ -372,7 +372,7 @@ static uint32_t tc6393xb_nand_readb(TC6393xbState *s, target_phys_addr_t addr) {
     fprintf(stderr, "tc6393xb_nand: unhandled read at %08x\n", (uint32_t) addr);
     return 0;
 }
-static void tc6393xb_nand_writeb(TC6393xbState *s, target_phys_addr_t addr, uint32_t value) {
+static void tc6393xb_nand_writeb(TC6393xbState *s, a_target_phys_addr addr, uint32_t value) {
 //    fprintf(stderr, "tc6393xb_nand: write at %08x: %02x\n",
 //					(uint32_t) addr, value & 0xff);
     switch (addr) {
@@ -495,7 +495,7 @@ static void tc6393xb_update_display(void *opaque)
 }
 
 
-static uint32_t tc6393xb_readb(void *opaque, target_phys_addr_t addr) {
+static uint32_t tc6393xb_readb(void *opaque, a_target_phys_addr addr) {
     TC6393xbState *s = opaque;
 
     switch (addr >> 8) {
@@ -516,7 +516,7 @@ static uint32_t tc6393xb_readb(void *opaque, target_phys_addr_t addr) {
     return 0;
 }
 
-static void tc6393xb_writeb(void *opaque, target_phys_addr_t addr, uint32_t value) {
+static void tc6393xb_writeb(void *opaque, a_target_phys_addr addr, uint32_t value) {
     TC6393xbState *s = opaque;
 
     switch (addr >> 8) {
@@ -535,13 +535,13 @@ static void tc6393xb_writeb(void *opaque, target_phys_addr_t addr, uint32_t valu
 					(uint32_t) addr, value & 0xff);
 }
 
-static uint32_t tc6393xb_readw(void *opaque, target_phys_addr_t addr)
+static uint32_t tc6393xb_readw(void *opaque, a_target_phys_addr addr)
 {
     return (tc6393xb_readb(opaque, addr) & 0xff) |
         (tc6393xb_readb(opaque, addr + 1) << 8);
 }
 
-static uint32_t tc6393xb_readl(void *opaque, target_phys_addr_t addr)
+static uint32_t tc6393xb_readl(void *opaque, a_target_phys_addr addr)
 {
     return (tc6393xb_readb(opaque, addr) & 0xff) |
         ((tc6393xb_readb(opaque, addr + 1) & 0xff) << 8) |
@@ -549,13 +549,13 @@ static uint32_t tc6393xb_readl(void *opaque, target_phys_addr_t addr)
         ((tc6393xb_readb(opaque, addr + 3) & 0xff) << 24);
 }
 
-static void tc6393xb_writew(void *opaque, target_phys_addr_t addr, uint32_t value)
+static void tc6393xb_writew(void *opaque, a_target_phys_addr addr, uint32_t value)
 {
     tc6393xb_writeb(opaque, addr, value);
     tc6393xb_writeb(opaque, addr + 1, value >> 8);
 }
 
-static void tc6393xb_writel(void *opaque, target_phys_addr_t addr, uint32_t value)
+static void tc6393xb_writel(void *opaque, a_target_phys_addr addr, uint32_t value)
 {
     tc6393xb_writeb(opaque, addr, value);
     tc6393xb_writeb(opaque, addr + 1, value >> 8);