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| author | Peter Maydell <peter.maydell@linaro.org> | 2019-10-22 17:50:39 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-10-22 17:50:39 +0100 |
| commit | ec97eb6133e204c8c0ee492cfc9c7551b6297aca (patch) | |
| tree | bbfe136326369ca04d62632f2d7148118a9e39c5 /hw/timer/altera_timer.c | |
| parent | f9bec781379dd7ccf9d01b4b6a79a9ec82c192e5 (diff) | |
| parent | 90600829b3355b8d27b791b893095c18f529aec3 (diff) | |
| download | focaccia-qemu-ec97eb6133e204c8c0ee492cfc9c7551b6297aca.tar.gz focaccia-qemu-ec97eb6133e204c8c0ee492cfc9c7551b6297aca.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20191022-2' into staging
* Fix sign-extension for SMLAL* instructions * Various ptimer device conversions to new transaction API * Add a dummy Samsung SDHCI controller model to exynos4 boards * Minor refactorings of RAM creation for some arm boards # gpg: Signature made Tue 22 Oct 2019 17:44:26 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20191022-2: hw/arm/digic4: Inline digic4_board_setup_ram() function hw/arm/omap1: Create the RAM in the board hw/arm/omap2: Create the RAM in the board hw/arm/collie: Create the RAM in the board hw/arm/mps2: Use the IEC binary prefix definitions hw/arm/xilinx_zynq: Use the IEC binary prefix definitions hw/arm/exynos4210: Use the Samsung s3c SDHCI controller hw/sd/sdhci: Add dummy Samsung SDHCI controller hw/sd/sdhci: Add a comment to distinct the i.MX eSDHC functions hw/m68k/mcf5208.c: Switch to transaction-based ptimer API hw/watchdog/etraxfs_timer.c: Switch to transaction-based ptimer API hw/timer/altera_timer.c: Switch to transaction-based ptimer API hw/timer/lm32_timer: Switch to transaction-based ptimer API hw/timer/sh_timer: Switch to transaction-based ptimer API hw/timer/puv3_ost.c: Switch to transaction-based ptimer API hw/timer/arm_mptimer.c: Undo accidental rename of arm_mptimer_init() hw/timer/exynos4210_mct: Initialize ptimer before starting it target/arm: Fix sign-extension for SMLAL* Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/timer/altera_timer.c')
| -rw-r--r-- | hw/timer/altera_timer.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/hw/timer/altera_timer.c b/hw/timer/altera_timer.c index ee32e0ec1f..79fc381252 100644 --- a/hw/timer/altera_timer.c +++ b/hw/timer/altera_timer.c @@ -19,7 +19,6 @@ */ #include "qemu/osdep.h" -#include "qemu/main-loop.h" #include "qemu/module.h" #include "qapi/error.h" @@ -53,7 +52,6 @@ typedef struct AlteraTimer { MemoryRegion mmio; qemu_irq irq; uint32_t freq_hz; - QEMUBH *bh; ptimer_state *ptimer; uint32_t regs[R_MAX]; } AlteraTimer; @@ -105,6 +103,7 @@ static void timer_write(void *opaque, hwaddr addr, break; case R_CONTROL: + ptimer_transaction_begin(t->ptimer); t->regs[R_CONTROL] = value & (CONTROL_ITO | CONTROL_CONT); if ((value & CONTROL_START) && !(t->regs[R_STATUS] & STATUS_RUN)) { @@ -115,10 +114,12 @@ static void timer_write(void *opaque, hwaddr addr, ptimer_stop(t->ptimer); t->regs[R_STATUS] &= ~STATUS_RUN; } + ptimer_transaction_commit(t->ptimer); break; case R_PERIODL: case R_PERIODH: + ptimer_transaction_begin(t->ptimer); t->regs[addr] = value & 0xFFFF; if (t->regs[R_STATUS] & STATUS_RUN) { ptimer_stop(t->ptimer); @@ -126,6 +127,7 @@ static void timer_write(void *opaque, hwaddr addr, } tvalue = (t->regs[R_PERIODH] << 16) | t->regs[R_PERIODL]; ptimer_set_limit(t->ptimer, tvalue + 1, 1); + ptimer_transaction_commit(t->ptimer); break; case R_SNAPL: @@ -183,9 +185,10 @@ static void altera_timer_realize(DeviceState *dev, Error **errp) return; } - t->bh = qemu_bh_new(timer_hit, t); - t->ptimer = ptimer_init_with_bh(t->bh, PTIMER_POLICY_DEFAULT); + t->ptimer = ptimer_init(timer_hit, t, PTIMER_POLICY_DEFAULT); + ptimer_transaction_begin(t->ptimer); ptimer_set_freq(t->ptimer, t->freq_hz); + ptimer_transaction_commit(t->ptimer); memory_region_init_io(&t->mmio, OBJECT(t), &timer_ops, t, TYPE_ALTERA_TIMER, R_MAX * sizeof(uint32_t)); @@ -204,8 +207,10 @@ static void altera_timer_reset(DeviceState *dev) { AlteraTimer *t = ALTERA_TIMER(dev); + ptimer_transaction_begin(t->ptimer); ptimer_stop(t->ptimer); ptimer_set_limit(t->ptimer, 0xffffffff, 1); + ptimer_transaction_commit(t->ptimer); memset(t->regs, 0, sizeof(t->regs)); } |