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| author | Joel Stanley <joel@jms.id.au> | 2019-11-19 15:12:01 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-12-16 10:46:34 +0000 |
| commit | 310b5bc69213684b5c2429494c04b3300d9a3150 (patch) | |
| tree | af7b6b28d74c6429ae350990813196d2caacb094 /hw/timer/aspeed_timer.c | |
| parent | d3ff9e69b70da720dd701b7badb0bd285ce8b34b (diff) | |
| download | focaccia-qemu-310b5bc69213684b5c2429494c04b3300d9a3150.tar.gz focaccia-qemu-310b5bc69213684b5c2429494c04b3300d9a3150.zip | |
aspeed/scu: Fix W1C behavior
This models the clock write one to clear registers, and fixes up some incorrect behavior in all of the write to clear registers. There was also a typo in one of the register definitions. Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 20191119141211.25716-8-clg@kaod.org [clg: checkpatch.pl fixes ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/timer/aspeed_timer.c')
0 files changed, 0 insertions, 0 deletions