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| author | Chenyi Qiang <chenyi.qiang@intel.com> | 2021-02-05 16:33:24 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2021-02-08 15:15:32 +0100 |
| commit | 6aa4228bd68cb251ccb5f802c015b494c6a10f19 (patch) | |
| tree | 889b4bf17d4c2bd8a7e9133abacee2de2e140215 /hw/timer/digic-timer.c | |
| parent | 735754aaa15a6ed46db51fd731e88331c446ea54 (diff) | |
| download | focaccia-qemu-6aa4228bd68cb251ccb5f802c015b494c6a10f19.tar.gz focaccia-qemu-6aa4228bd68cb251ccb5f802c015b494c6a10f19.zip | |
target/i386: Add support for save/load IA32_PKRS MSR
PKS introduces MSR IA32_PKRS(0x6e1) to manage the supervisor protection key rights. Page access and writes can be managed via the MSR update without TLB flushes when permissions change. Add the support to save/load IA32_PKRS MSR in guest. Signed-off-by: Chenyi Qiang <chenyi.qiang@intel.com> Message-Id: <20210205083325.13880-2-chenyi.qiang@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/timer/digic-timer.c')
0 files changed, 0 insertions, 0 deletions